AMIS-30624 AMI Semiconductor, Inc., AMIS-30624 Datasheet - Page 46

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AMIS-30624

Manufacturer Part Number
AMIS-30624
Description
I2c Microstepping Motordriver
Manufacturer
AMI Semiconductor, Inc.
Datasheet
AMIS-30624 I
17.3 Application Commands
GetFullStatus1
This command is provided to the circuit by the master to get a complete status of the circuit and of the steppermotor. Refer to Table 18
and Table 19 to see the meaning of the parameters sent back to the I
Note: A GetFullStatus1 command will attempt to reset flags < TW >, < TSD >, < UV2 >, < ElDef >, < StepLoss >, < CPFail >, < OVC1 >,
< OVC2 >, and < VddReset >.
AMI Semiconductor – Apr. 2007, Rev 3.1, M-20664-003
www.amis.com
GetFullStatus1 corresponds to the following I
Byte
Byte
0
1
0
1
2
3
4
5
6
7
8
Where:
OTP(n)
HW
Irun[3:0]
Ihold[3:0]
Vmax[3:0]
Vmin[3:0]
AccShape
StepMode[1:0] Step mode definition
Shaft
Acc[3:0]
VddReset
StepLoss
ElDef
UV2
TSD
TW
Tinfo[1:0]
Motion[2:0]
ESW
OVC1
OVC2
Stall
CPFail
AbsThr[3:0]
DelThr[3:0]
Command
Content
Address
Content
Address
Address
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
2
C Microstepping Motordriver
AccShape
VddReset
OTP address bits PA[3:0]
Hardwired address bit
Operating current in the motor coil
Standstill current in the motor coil
Maximum velocity
Minimum velocity
Enables motion without acceleration
Direction of movement
Acceleration form minimum to maximum velocity
Reset of digital supply
Step loss occurred
Electrical defect
Battery under voltage detected
Thermal shutdown
Thermal warning
Temperature Info
Motion status
External switch status
Over current in X-coil detected
Over current in Y-coil detected
Stall detected
Charge pump failure
Stall detection absolute threshold
Stall detection delta threshold
Bit 7
Bit 7
1
1
1
1
1
Motion[2:0]
StepLoss
StepMode[1:0]
Bit 6
Bit 6
AbsThr[3:0]
GetFullStatus1 Command Frame
1
0
1
1
1
GetFullStatus1 Response Frame
2
Irun[3:0]
Vmax[3:0]
C command frame:
ElDef
OTP3
OTP3
Bit 5
Bit 5
0
1
1
46
2
C master.
Shaft
OTP2
OTP2
OTP3
Bit 4
Bit 4
UV2
ESW
Structure
Structure
0
1
OTP1
OTP1
OTP2
OVC1
Bit 3
Bit 3
TSD
0
1
OTP0
OTP0
OTP1
OVC2
Bit 2
Bit 2
TW
0
1
DelThr[3:0]
Ihold[3:0]
Vmin[3:0]
Acc[3:0]
Stall
OTP0
Bit 1
Bit 1
HW
HW
0
Tinfo[1:0]
1
CPFail
Bit 0
Bit 0
HW
0
1
1
1
Data Sheet

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