11274-001 AMI Semiconductor, Inc., 11274-001 Datasheet

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Features Complete programmable control via I Selectable CMOS or PECL compatible outputs External feedback loop capability allows genlocking Tunable VCXO loop for jitter attenuation Commercial (FS6131-01) and industrial (FS6131-01i) temperature versions available 2.0 Description The FS6131- monolithic ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Table 1: Pin Descriptions Key Analog Input Analog ...

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Feedback Divider The Feedback Divider is based on a dual-modulus prescaler technique. The technique allows the same granularity as a fully programmable feedback divider, while still allowing the programmable portion to operate at low speed. A high-speed pre-divider (also ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC The Post Divider performs several useful functions. First, it allows the VCO ...

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To enter this mode, set STAT[1] to one and clear STAT[0] to zero. If the CMOS bit is set to one, the LOCK/IPRG pin can display the flag. The flag is always available under software control by reading back the ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC The loop phase angle is: arg K i LOOP Figure 9: Loop ...

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VCXO Tuning The VCXO may be coarse tuned by a programmable ad- justment of the crystal load capacitance via the XCT[3:0] control bits. See Table 11 for the control code and the associated loading capacitance. The actual amount of ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 4.5.1.2 Out-Of-Range High/Low The direction the loop has gone out-of-range can be ...

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I C-bus Control Interface This device is a read/write slave device meeting all Philips I except a “general call.” The bus has to be controlled by a master device that generates the serial clock SCL, controls bus access, ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 5.2.2 Random Register Write Procedure Random write operations allow the master to ...

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Figure 13: Random Register Write Procedure S DEVICE ADDRESS W A REGISTER ADDRESS 7-bit Receive Register Address Device Address Acknowledge START WRITE Command Command From bus host to device Figure 14: Random Register Read Procedure S DEVICE ADDRESS W A ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 6.0 Programming Information All register bits are cleared to zero on power-up. ...

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Table 4: Device Configuration Bits NAME DESCRIPTION REFerence Divider SouRCe REFDSRC Bit = 0 Crystal Oscillator (VCXO) (Bit 12) Bit = 1 REF pin main loop SHUT down select SHUT Bit = 0 Disabled (main loop operates) (Bit 13) Bit ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Table 8: Divider Control Bits NAME DESCRIPTION REFDIV[11:0] REFerence DIVider (N (Bits ...

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VCXO Coarse Tune The VCXO may be coarse tuned by a programmable ad- justment of the crystal load capacitance via XCT[3:0]. The actual amount of frequency warping caused by the tuning capacitance will depend on the crystal used. The ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 7.0 Electrical Specifications Table 12: Absolute Maximum Ratings Stresses above those listed ...

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Table 14: DC Electrical Specifications Unless otherwise stated 5.0V ± 10%, no load on any output, and ambient temperature range T DD data and are not production tested to any specific limits. MIN and MAX characterization data are ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 15: DC Electrical Specifications, continued Table Unless otherwise stated 5.0V ...

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Table 16: AC Timing Specifications Unless otherwise stated 5.0V ± 10%, no load on any output, and ambient temperature range T DD data and are not production tested to any specific limits. MIN and MAX characterization data are ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Table 17: AC Timing Specifications, continued Unless otherwise stated 5.0V ...

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Table 18: Serial Interface Timing Specifications Unless otherwise stated 5.0V ± 10%, no load on any output, and ambient temperature range T DD data and are not production tested to any specific limits. MIN and MAX characterization data ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Table 19: CLKP, CLKN Clock Outputs (CMOS Mode) Low Drive Current (mA) ...

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Package Information Table 21: 16-pin SOIC (0.150") Package Dimensions DIMENSIONS INCHES MILLIMETERS MIN. MAX. MIN. MAX. A 0.061 0.068 1.55 1.73 A1 0.004 0.0098 0.102 0.249 A2 0.055 0.061 1.40 1.55 B 0.013 0.019 0.33 0.49 C 0.0075 0.0098 ...

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... Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 9.0 Ordering Information 9.1 Device Ordering Codes DEVICE ORDERING CODE NUMBER 11274-001 FS6131 11274-011 FS6131 11274-901 FS6131 11274-911 FS6131 9.2 Demo Kit Ordering Codes ORDERING CODE ...

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Demonstration Board and Software A simple demonstration board and Windows 3.1x/95/98-based software is available from American Microsystems that illustrates the capabilities of the FS6131. The software can operate under Windows NT but cannot communicate with the board. The board ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 10.1 Demo Kit Contents Demonstration board Interface cable (DB25 to 6-pin connector) ...

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Device Mode The Device Mode block presets the demo program to program the FS6131 either as a frequency synthesizer (a stand alone clock generator line-locked or gen- lock clock generator. Frequency Synthesis: For use as a ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 10.4.3 Example: Line Locked Mode Selecting the Line-Locked/Genlock option in the Device ...

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Table 24: Sample Text Output AMI - FS6131 Solution Text File Line-Locked / Genlock Mode Desired Multiple = 800 Source = .0315MHz Reference Pin External Loop Filter C1 = 47pF Crystal Oscillator Voltage Tune Disabled Output Stage = CMOS Reference ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 11.0 Applications Information A signal reflection will occur at any point on ...

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CMOS Output Mode If a CMOS interface is desired, a transmission line is typi- cally terminated using a series termination. Series termi- nation adds no dc loading to the driver, and requires less power than other resistive termination methods. ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 12.0 Device Application: Stand-Alone Clock Generation The length of the reference and ...

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Next, express the output and input frequencies as a ratio where f has also been converted to a CLK REF CLK product of prime numbers. f 100000000 . 00 CLK æ f 14318181 . 81 ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 13.0 Device Application: Line-Locked Clock Generation Line-locked clock generation, as used here, ...

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However, the 31.5kHz line reference signal is too low in frequency for the internal loop filter to be used. A series combination of a 0.015 F capacitor and a 15k from power ( the EXTLF pin provides an ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 14.0 Device Application: Genlocking Genlocking refers to the process of synchronizing the ...

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The output clock frequency is calculated kHz 800 CLK For best performance, program the Post Divider (N modulus to allow the VCO to operate at a nominal fre- quency that is at least 70MHz but less then ...

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FS6131-01 FS6131-01 FS6131-01 FS6131-01 Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC Programmable Line Lock Clock Generator IC 15.0 Device Application: Telecom Clock Regenerator The FS6131 can be used as ...

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The goal is to choose the highest crystal frequency from Table 10 that generates the smallest value of N The equation establishing the output frequency (f function of the input VCXO frequency CLK VCXO ...