MPC857T Freescale Semiconductor, Inc, MPC857T Datasheet - Page 42
MPC857T
Manufacturer Part Number
MPC857T
Description
Mpc857t Powerquicc Integrated Communications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC857T.pdf
(88 pages)
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Bus Signal Timing
Table 12
42
R69
R70
R71
R72
R73
R74
R75
R76
R77
R78
R79
R80
R81
R82
Num
shows the reset timing for the MPC862/857T/857DSL.
CLKOUT to HRESET high impedance
(MAX = 0.00 x B1 + 20.00)
CLKOUT to SRESET high impedance
(MAX = 0.00 x B1 + 20.00)
RSTCONF pulse width
(MIN = 17.00 x B1)
—
Configuration data to HRESET rising
edge set up time
(MIN = 15.00 x B1 + 50.00)
Configuration data to RSTCONF rising
edge set up time
(MIN = 0.00 x B1 + 350.00)
Configuration data hold time after
RSTCONF negation
(MIN = 0.00 x B1 + 0.00)
Configuration data hold time after
HRESET negation
(MIN = 0.00 x B1 + 0.00)
HRESET and RSTCONF asserted to
data out drive (MAX = 0.00 x B1 + 25.00)
RSTCONF negated to data out high
impedance. (MAX = 0.00 x B1 + 25.00)
CLKOUT of last rising edge before chip
three-states HRESET to data out high
impedance. (MAX = 0.00 x B1 + 25.00)
DSDI, DSCK set up (MIN = 3.00 x B1)
DSDI, DSCK hold time
(MIN = 0.00 x B1 + 0.00)
SRESET negated to CLKOUT rising
edge for DSDI and DSCK sample
(MIN = 8.00 x B1)
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
Characteristic
Table 12. Reset Timing
515.20
504.50
350.00
242.40
90.90
0.00
0.00
0.00
Min
—
—
—
—
—
—
33 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
425.00
425.00
350.00
200.00
75.00
0.00
0.00
0.00
Min
—
—
—
—
—
—
40 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
340.00
350.00
350.00
160.00
60.00
0.00
0.00
0.00
Min
—
—
—
—
—
—
50 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
257.60
277.30
350.00
121.20
45.50
Freescale Semiconductor
0.00
0.00
0.00
Min
—
—
—
—
—
—
66 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns