UMA1022M NXP Semiconductors, UMA1022M Datasheet - Page 6

• Manufacturer Part Number: UMA1022M
• Description: Low Cost Dual Frequency Synthesizer For Radio Telephones
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Data format
The leading bits (dt15 to dt0) make up the data field, while
the trailing three bits (ad2 to ad0) comprise an address
field. The UMA1022M uses 4 of the 8 available addresses.
The data format is shown in Table 1. The first bit entered
is dt15, the last bit is ad0. For the divider ratios, the first
bits entered (P0 and R0) are the Least Significant Bits
(LSB). This is different from previous Philips
synthesizers.
The trailing address bits are decoded on the rising edge of
E. This produces an internal load pulse to store the data in
the addressed latch. To avoid erroneous divider ratios, the
load pulse is not allowed during data reads by the
frequency dividers. This condition is guaranteed by
respecting a minimum E pulse width after data
transfer.The test register bits should not normally be
programmed active (HIGH); normal operation requires
them set LOW. When the supply voltage is established an
internal power-up initialization pulse is generated to
preconfigure the circuit state. Production testing does not
verify that all bits are preconfigured correctly.
Table 1 Bit allocation; note 1
Notes
1. X = don’t care.
2. The test bits (at address 011) should not be programmed with any other value except all zeros for normal operation.
3. Bit XON = power-on of crystal oscillator low-noise amplifier; logic 1 turns on circuit block.
4. Bit P/A = 1 selects the output of the reference subdivider to the RF synthesizer and the output of the common
5. The coefficient REFDIV2 (4 bits) selects the phase comparison ratio (1 to 16) between IF and RF synthesizers
6. P0 is the LSB of the RF main divider coefficient; R0 is the LSB of the reference divider coefficient; A0 is the LSB of
1998 Dec 09
P0
dt15 dt14 dt13 dt12 dt11 dt10
FIRST IN
Low cost dual frequency synthesizer for
radio telephones
X
X
(6)
reference divider to the IF synthesizer.
(see Table 2).
the IF main divider.
Test bits
X
X
A0
X
(2)
(6)
X
CPI
X
RF synthesizer main divider coefficient
S/D
X
IF synthesizer main divider coefficient
XON
R0
dt9
DATA FIELD
REGISTER BIT ALLOCATION
(6)
(3)
dt8 dt7 dt6 dt5
X
X
reference divider coefficient
6
Power-down mode
The RF and IF synthesizers are on when respectively the
input signal ON
dividers and phase detector are synchronized to avoid
random phase errors. When turned off, the phase detector
is synchronized to avoid interrupting charge pump pulses.
The UMA1022M has a very low current consumption in the
power-down mode.
X
X
P/A
dt4
(4)
A
and ON
dt3 dt2 dt1 dt0
REFDIV2
B
are HIGH. When turned on, the
(5)
P15
A13
R9
Product specification
UMA1022M
ad2 ad1 ad0
0
0
0
0
ADDRESS
LAST IN
1
0
0
1
1
0
1
0