FIN1049 Fairchild Semiconductor, FIN1049 Datasheet - Page 4

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FIN1049

Manufacturer Part Number
FIN1049
Description
Fin1049 Lvds Dual Line Driver With Dual Line Receiver
Manufacturer
Fairchild Semiconductor
Datasheet

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Part Number:
FIN1049MTCX
Manufacturer:
Zilog
Quantity:
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t
t
t
t
t
t
t
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
t
t
f
PLHD
PHLD
TLHD
THLD
SK(P)
SK(LH)
SK(HL)
SK(PP)
PZHD
PZLD
PHZD
PLZD
MAXD
PHL
PLH
SK1
SK2
SK3
LHR
HLR
PHZ
PLZ
PZH
PZL
MAXT
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 5: All typical values are at T
Note 6: t
direction.
Note 7: t
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Note 8: f
nels switch.
Note 9: f
Symbol
2.7V. V
,
MAX
SK(LH)
SK(PP)
MAXT
OL
Differential Propagation Delay LOW-to-HIGH
Differential Propagation Delay HIGH-to-LOW
Differential Output Rise Time (20% to 80%)
Differential Output Fall Time (80% to 20%)
Pulse Skew |t
Channel-to-Channel Skew (Note 6)
Part-to-Part Skew (Note 7)
Differential Output Enable Time from Z-to-HIGH
Differential Output Enable Time from A-to-LOW
Differential Output Disable Time from HIGH-to-Z
Differential Output Disable Time from LOW-to-Z
Maximum Frequency (Note 8)
Propagation Delay HIGH-to-LOW
Propagation Delay LOW-to-HIGH
Pulse Skew
Channel-to-Channel Skew
Part-to-Part Skew
Transition Time LOW-to-HIGH
Transition Time HIGH-to-LOW
Disable Time HIGH-to-Z
Disable Time LOW-to-Z
Enable Time Z-to-HIGH
Enable Time Z-to-LOW
Maximum Frequency (Note 9)
generator input conditions: t
0.25V, all channels switching.
generator input conditions: t
, t
is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
SK(HL)
is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same
PLH
- t
Parameter
A
PHL
25 C and with V
|
r
r
t
f
t
f
1ns (10% to 90%), 50% duty cycle, 0V to 3V. Output criteria: duty cycle
1ns (10% to 90%), 50% duty cycle, V
CC
Switching Characteristics - LVTTL Outputs
Switching Characteristics - LVDS Outputs
3.3V.
See Figures 3, 4
See Figures 5, 6
See Figure 3
Measured from 20% to 80% signal
V
Distributed Load
C
R
V
See Figures 7, 8
See Figures 9, 10
See Figure 7
ID
OS
L
L
15pF and 50 ;
1K ;
200mV;
1.2V;
4
Test Conditions
ID
200mV, V
CM
1.2V. Output criteria: duty cycle
Min
200
200
0.2
0.2
0.5
0.5
0.0
0.0
0.0
0.1
0.1
2.2
1.3
1.8
0.9
45% / 55%, V
(Note 5)
0.18
35.0
50.0
0.25
Typ
1.0
1.0
4.5
3.5
3.0
1.4
OD
250mV, all chan-
Max
0.35
0.35
45% / 55%, V
400
500
2.0
2.0
1.0
1.0
1.0
6.0
6.0
3.0
3.0
3.5
3.5
1.0
1.4
1.4
8.0
8.0
7.0
7.0
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ns
ns
ns
ns
ns
ns
ns
OH

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