LMX2487 National Semiconductor Corporation, LMX2487 Datasheet - Page 27

• Manufacturer Part Number: LMX2487
• Description: 3.0 Ghz - 6.0 Ghz High Performance Delta-sigma Low Power Dual Pllatinum? Frequency Synthesizers With 3.0 Ghz Integer Pll
• Manufacturer: National Semiconductor Corporation

REGISTER
Programming Description
2.2 R1 REGISTER
2.2.1 RF_FD[11:0] -- RF PLL Fractional Denominator
The function of these bits are described in section 2.6.2.
2.2.2 RF_R [5:0] -- RF R Divider Value
The RF R Counter value is determined by this control word. Note that this counter does allow values down to one.
2.2.3 RF_P -- RF Prescaler bit
The prescaler used is determined by this bit.
2.2.4 RF_PD -- RF Power Down Control Bit
When this bit is set to 0, the RF PLL operates normally. When it is set to one, the RF PLL is powered down and the RF Charge
pump is set to a TRI-STATE mode. The CE pin and ATPU bit also control power down functions, and will override the RF_PD bit.
The order of precedence is as follows. First, if the CE pin is LOW, then the PLL will be powered down. Provided this is not the
case, the PLL will be powered up if the ATPU bit says to do so, regardless of the state of the RF_PD bit. After the CE pin and the
ATPU bit are considered, then the RF_PD bit then takes control of the power down function for the RF PLL.
R1
R Value
63
...
1
RF_PD
23
RF_P
0
1
RF_P
22
21
0
1
.
20
RF_R[5:0]
19
18
(Continued)
16/17/20/21
32/33/36/37
0
1
17
.
Prescaler
DATA[19:0]
16
15
27
14
0
1
.
13
RF_R[5:0]
12
RF_FD[11:0]
11
10
0
1
.
9
Maximum Frequency
8
7
4000 MHz
6000 MHz
6
0
1
.
5
4
C3
3
0
C2
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2
0
1
1
.
C1
1
1
C0
0
1