LMX2346 National Semiconductor Corporation, LMX2346 Datasheet - Page 24

• Manufacturer Part Number: LMX2346
• Description: Pllatinum? Frequency Synthesizer For Rf Personal Communications
• Manufacturer: National Semiconductor Corporation

www.national.com
2.0 Programming Description
2.2.5 R_OPT[2:0]
The R_OPT control words are used to optimize the performance of the reference buffer circuit for best Phase Noise and power
consumption performance based on the frequency of the reference source.
2.3 N REGISTER
The N register contains the PD (Power-Down), NA_CNTR, and NB_CNTR control words. The NA_CNTR, and NB_CNTR control
words are used to setup the programmable feedback divider. The PWR-DN control word is used to switch the device between the
normal operating mode and various power-down modes.
2.3.1 PD[1:0]
The PD control word is used to switch the device between the normal operating mode and various power-down modes.
2.3.2 NA_CNTR[4:0]
The NA_CNTR control word is used to program the A counter. The A counter is a 5-bit swallow counter used in the programmable
feedback divider. The A counter can be programmed to values ranging from 0 to 31. See Section 1.4 for details on how the value
of the A counter should be selected.
2.3.3 NB_CNTR[9:0]
The NB_CNTR control word is used to program the B counter. The B counter is a 10-bit binary counter used in the programmable
feedback divider. The B counter can be programmed to values ranging from 3 to 1023. See Section 1.4 for details on how the
value of the B counter should be selected.
Register
N
B Counter Value
A Counter Value
1023
3
4
•
Most Significant Bit
17
31
0
1
•
Power-Down
16
Reference Oscillator Optimization
PD [1:0]
15
A Counter
B Counter
0
1
2
3
14
0
0
1
•
13
NB_CNTR [9:0]
N[2:1]
12
0
0
1
N[7:3]
N[17:8]
•
R_OPT[2:0]
0
0
1
•
1-6
0
7
11
SHIFT REGISTER BIT LOCATION
0
0
1
•
(Continued)
10
Data Field
0
0
1
•
0
0
1
•
24
R[17:15]
9
Optimization Frequency
Reserved — Do not use.
NB_CNTR[9:0]
50 MHz–104 MHz
8
0
0
1
•
5 MHz–50 MHz
NA_CNTR[4:0]
Range
Normal Operation
Synchronous Power-down
Counter Reset
Asynchronous Power-down
7
0
0
1
•
0
0
1
•
NA_CNTR [4:0]
Operating Mode
6
0
0
1
•
5
4
0
0
1
•
0
1
1
•
3
Least Significant Bit
PD [1:0]
2
1
0
1
•
1
0
1
1
•
ADDR
1
0
1
•
0
0