LMX2330L National Semiconductor Corporation, LMX2330L Datasheet - Page 17
LMX2330L
Manufacturer Part Number
LMX2330L
Description
Pllatinum? Low Power Dual Frequency Synthesizer For Rf Personal Communications
Manufacturer
National Semiconductor Corporation
Datasheet
1.LMX2330L.pdf
(23 pages)
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Functional Description
SERIAL DATA INPUT TIMING
Note 1: Parenthesis data indicates programmable reference divider data.
Note 2: t
Test Conditions: The Serial Data Input Timing is tested using a symmetrical waveform around V
amplitudes of 2.2V
PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS
Notes: Phase difference detection range: −2 to +2
Data shifted into register on clock rising edge.
Data is shifted in MSB first.
cs
t
t
t
t
t
The minimum width pump up and pump down current pulses occur at the D
R16 = HIGH
CH
CWH
CWL
ES
EW
= Data to Clock Set-Up Time
= Clock to Load Enable Set-Up Time
= Data to Clock Hold Time
= Load Enable Pulse Width
= Clock Pulse Width Low
= Clock Pulse Width High
@
V
CC
= 2.7V and 2.6V
@
V
CC
(Continued)
= 5.5V.
17
o
pin when the loop is locked.
CC
/2. The test waveform has an edge rate of 0.6 V/ns with
01280611
01280610
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