RS5C313 RICOH Co.,Ltd., RS5C313 Datasheet - Page 16

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RS5C313

Manufacturer Part Number
RS5C313
Description
Ultra-compact Real-time Clock Ic
Manufacturer
RICOH Co.,Ltd.
Datasheet

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16
RS5C313
3. CE Pin
1) Switching the CE pin to the high level enables both the SCLK and SIO pins, allowing data to be serially read from and
2) Switching the CE pin to the low level or opening it disables both the SCLK and SIO pins, causing high impedance and
3) The CE pin should be held at the low level or open state when no access is made to the RS5C313. The CE pin incorpo-
4) During system power-down (being back-up battery powered), the low-level input of the CE pin should be brought as close
5) Holding the CE pin at the high level for more than 2.5 seconds mainly forces 1Hz interrupt pulses to be output from the
6) The CE pin should be held at the low level in order to enable oscillator halt sensing. Holding the CE pin at the high level,
SCLK
written to the SIO pin in synchronization with shift clock pulses input from the SCLK pin.
resetting the internal interfacing circuits such as the shift register.
rates a pull-down resistor.
as possible to the VSS level to minimize the loss of charge in the battery.
INTR pin for oscillation frequency measurement. When the CE pin is held at the high level for less than 1.5 seconds, no
pulse is output.
therefore, disables oscillator halt sensing, retaining the value of the XSTP (oscillator halt sensing) bit which exists imme-
diately before the CE pin is switched to the high level.
When the power turns on from 0V, the CE pin should be set low or open once.
SIO
CE
Address & Write data
Shift clock pulses
Read data
Reading control bits
Control bits
Considerations

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