HT46R63 Holtek Semiconductor Inc., HT46R63 Datasheet - Page 20

• Manufacturer Part Number: HT46R63
• Description: Ht46r63/ht46c63 -- A/d With Lcd Type 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

A/D Converter
The 8 channels and 8-bit resolution A/D converter are
implemented in this microcontroller. The reference volt-
age is AVDD. The AVDD pin must be connected to VDD
externally. Conversion accuracy may therefore be de-
graded by voltage drops and noise in the event of
heavily loaded or badly coupled power supply lines. The
A/D converter contains 3 special registers which are;
ADR (21H), ADCR (22H) and ACSR (23H). The ADR is
A/D result register. After the A/D conversion is com-
pleted, the ADR should be read to get the conversion re-
sult data. The ADCR is an A/D converter control
register, which defines the A/D channel number, analog
channel select, start A/D conversion control bit and the
end of A/D conversion flag. If the users want to start an
A/D conversion, define PB configuration, select the con-
verted analog channel, and give START bit a rising edge
and falling edge (0 1 0). At the end of A/D conver-
sion, the EOCB bit is cleared and an A/D converter inter-
rupt occurs(if the A/D converter interrupt is enabled).
The ACSR is an A/D clock setting register, which is used
to select the A/D clock source.
The A/D converter control register is used to control the
A/D converter. The bit2~bit0 of the ADCR are used to
select an analog input channel. There are a total of 8
channels to select. The bit5~bit3 of the ADCR are used
to set PB configurations. PB can be an analog input or
as digital I/O line decided by these 3 bits. Once a PB line
is selected as an analog input, the I/O functions and
Rev. 2.30
LCD Bias Block Diagram and Application Circuit
20
pull-high resistor of this I/O line are disabled. The EOCB
bit (bit 6 of the ADCR) is end of A/D conversion flag.
Check this bit to know when A/D conversion is com-
pleted. The START bit of the ADCR is used to begin the
conversion of A/D converter. Give START bit a falling
edge that means the A/D conversion has started. The
A/D converter remains in reset state while the START
stays at 1 . In order to ensure the A/D conversion is
completed, the START should stay at
is cleared to 0 (end of A/D conversion).
Bit 7 of the ACSR register is used for test purposes only
and must not be used for other purposes by the applica-
tion program. Bit1 and bit0 of the ACSR register are
used to select the A/D clock source.
When the A/D conversion has completed, the A/D inter-
rupt request flag will be set. The EOCB bit is set to 1
when the START bit is set from 0 to 1 .
Important Note for A/D initialization:
Special care must be taken to initialize the A/D con-
verter each time the Port B A/D channel selection bits
are modified, otherwise the EOCB flag may be in an un-
defined condition. An A/D initialization is implemented
by setting the START bit high and then clearing it to zero
within 10 instruction cycles of the Port B channel selec-
tion bits being modified. Note that if the Port B channel
selection bits are all cleared to zero then an A/D initial-
ization is not required.
HT46R63/HT46C63
0
March 22, 2006
until the EOCB