DSPIC30F2012 Microchip Technology Inc., DSPIC30F2012 Datasheet - Page 103

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DSPIC30F2012

Manufacturer Part Number
DSPIC30F2012
Description
Dspic30f2011/2012/3012/3013 High-performance Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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15.0
This section describes the Universal Asynchronous
Receiver/Transmitter Communications module. The
dsPIC30F2011/2012/3012 processors have one UART
module (UART1). The dsPIC30F3013 processor has
two UART modules (UART1 and UART2).
FIGURE 15-1:
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046).
UxTX
Note:
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART) MODULE
x = 1 or 2.
UART TRANSMITTER BLOCK DIAGRAM
Internal Data Bus
UTXBRK
Data
Parity
dsPIC30F2011/2012/3012/3013
0
1
’ (Start)
’ (Stop)
Generator
Parity
Write
Transmit Shift Register (UxTSR)
UTX8 UxTXREG Low Byte
15.1
The key features of the UART module are:
• Full-duplex, 8 or 9-bit data communication
• Even, odd or no parity options (for 8-bit data)
• One or two Stop bits
• Fully integrated Baud Rate Generator with 16-bit
• Baud rates range from 38 bps to 1.875 Mbps at a
• 4-word deep transmit data buffer
• 4-word deep receive data buffer
• Parity, framing and buffer overrun error detection
• Support for interrupt only on address detect
• Separate transmit and receive interrupts
• Loopback mode for diagnostic support
• Alternate receive and transmit pins for UART1
prescaler
30 MHz instruction rate
(9th bit = 1)
Load TSR
UART Module Overview
16 Divider
Write
Control
Signals
Control and Status bits
– Control TSR
– Control Buffer
– Generate Flags
– Generate Interrupt
Transmit Control
16x Baud Clock
from Baud Rate
Generator
DS70139E-page 101
UxTXIF

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