UPS703 Unisonic Technologies, UPS703 Datasheet - Page 8

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UPS703

Manufacturer Part Number
UPS703
Description
High Performance Current Mode Power Switch
Manufacturer
Unisonic Technologies
Datasheet
UPS703
(5) Constant Output Power Limit
GATE drive will be turned off after a small propagation delay t
current proportional to t
V
than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is
adjusted by the V
higher line voltage will generate higher V
current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the
total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC.
(6) Protection section
continual blanking time, the driver is shut down. At the same time, IC enters auto-restart, V
reset after V
OLP
not inactive during soft-start phase. OLP case as followed FIG. 6. The test circuit as followed FIG.8. T
OVP
(OLP)
for continual a blanking time. The first OVP function will not inactive after soft-start phase. The second OVP will
shutdown the switching of the power MOSFET whenever V
circuit as followed FIG.9.
IN
. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
When the SENSE voltage, across the sense resistor R
The IC takes on more protection functions such as OLP, OVP and OTP etc. In case of those failure modes for
After soft-start phase end, IC will shutdown driver if over load state occurs for continual T
There are two kinds of OVP circuits, the first OVP function are enabled only when V
during soft-start phase. During above condition, driver will be shutdown if over voltage state occurs (V
FUNCTIONAL DESCRIPTION(Cont.)
CC
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
power on again.
IN
current. Since V
FIG.6 OLP case
D
×V
IN
/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
IN
pin is connected to the rectified input line voltage through a resistor R
IN
current into the V
CC
S
, reaches the threshold voltage, around 0.8V, the output
>V
IN
D
. This propagation delay will introduce an additional
OVP2
pin. The threshold voltage is decreased if the V
. The first OVP case as followed FIG.7. The test
LINEAR INTEGRATED CIRCUIT
FIG.7 OVP case
SS
CC
<V
D-OLP
power on and driver is
SS (DEACT)
. OLP function will
D-OLP
QW-R119-015.A
& V
=5.53×T
CC
>V
8 of 12
FB
>V
VIN
OVP1
, a
SS.
FB
IN
)

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