EM65565A ELAN Microelectronics Corp, EM65565A Datasheet - Page 15

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EM65565A

Manufacturer Part Number
EM65565A
Description
65 Com/ 132 Seg Stn Lcd Driver
Manufacturer
ELAN Microelectronics Corp
Datasheet
Product Specification (V1.0) 06.06.2005
(This specification is subject to change without further notice)
Pin Name
DCLKS
MPUS
(R/W)
DCLK
/RST
/CS1
CS2
/WR
/RD
M/S
P/S
(E)
D/I
I/O
I/O
I
I
I
I
I
I
I
I
I
When /RST is set to “L,” the settings are initialized.
Determines whether the data bits are data or instruction (command).
Chip select signal. When /CS1 = “L” and CS2 = “H,” then the chip select CS2
becomes active, and data/command I/O is enabled.
Enable clock signal input for the 68-series MPU, active high.
Active low input pin for the 80-series MPU /RD signal
Read/Write control signal with 68-series MPU.
R/W=”H”: Read
R/W=”L”: Write
Active low input pin for the 80 series MPU /WR signal.
MPU interface switch terminal.
MPUS = ”H”: 68-series MPU interface
MPUS = ”L”: 80-series MPU interface
Selects whether Parallel or Serial data input interface.
P/S = “H”: Parallel data input interface
P/S = “L”: Serial data input interface
The following applies depending on the P/S status:
When P/S = “L”, D0 to D5 are HZ. D0 to D5 may be “H”, “L” or Open.
RD (E) and WR (P/W) are fixed to either “H” or “L”.
With serial data input, RAM display data reading is not supported.
Terminal used to select whether to enable or disable the display clock internal
oscillator circuit.
DCLKS = “H”: Internal oscillator circuit is enabled
DCLKS = “L”: Internal oscillator circuit is disabled (requires external input)
When DCLKS = “L”, input the display clock through the DCLK terminal.
M/S = “H”: Master operation
M/S = “L”: Slave operation
The following is true, depending on the M/S and DCLKS status:
O : Output I : Input
Display clock input terminal.
The following is true depending on the M/S and DCLKS status.
When the EM65565A chips are used in master/slave mode, the various DCLK
terminals must be connected.
P/S Data/Command
M/S DCLKS
M/S
D/I
H
H
H
H
L
L
L
L
DCLKS
Instruction (Command)
H
H
H
H
L
L
L
L
Display data
D/I
D/I
D0 to D7
Oscillator
Disable
Disable
Disable
Output
Enable
DCLK
circuit
Input
Input
Input
D0 to D7
D7 (SI)
Power Supply
Data
Disable
Disable
Enable
Enable
Circuit
Function
Read/Write Serial Clock
Write only
/RD, /WR
DCLK FR
O
I
I
I
65 COM/132SEG STN LCD Driver
O
O
I
I
FRS
D6 (SCL)
O
O
O
O
/BCT
O
O
I
I
EM65565A
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