SSD2119 Crystalfontz America, Inc.,, SSD2119 Datasheet - Page 54

• Manufacturer Part Number: SSD2119
• Description: 320 Rgb X 240 Tft Lcd Driver Integrated Power Circuit, Source And Gate Driver And Ram
• Manufacturer: Crystalfontz America, Inc.,

Vertical Porch (R17h) (POR = 0003h)
VFP[6:0]: Set the delay period from the last valid line to the falling edge of VSYNC of the next frame. The line data
within this delay period will be treated as dummy line.
VBP[7:0]: Set the delay period from falling edge of VSYNC to first valid line. The line data within this delay period
will be treated as dummy line.
R/W
W
Solomon Systech
POR
VSYNC
HSYNC
DC
1
IB15 IB14 IB13 IB12 IB11
0
0
VFP6 VFP5 VFP4 VFP3 VFP2 VFP1 VFP0 VBP7 VBP6 VBP5 VBP4 VBP3 VBP2 VBP1 VBP0
VBP7 VBP6 VBP5 VBP4 VBP3 VBP2 VBP1 VBP0
VFP6 VFP5 VFP4 VFP3 VFP2 VFP1 VFP0
0
0
0
1
1
0
0
0
0
1
1
:
Dummy Lines
Set by VBP[7:0]
0
0
0
0
0
1
1
0
0
1
1
:
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
1
1
0
0
1
1
1
st
IB10
Line
:
:
:
0
Cycle time of VSYNC
0
0
0
0
1
1
0
0
1
1
IB9
0
0
0
1
1
0
0
0
0
1
1
Set by MUX[8:0]
IB8
0
1
1
0
1
0
1
0
0
1
1
IB7
0
No. of clock cycle of
1
0
1
0
0
1
IB6
0
1 (POR)
Step = 1
HSYNC
No. of clock cycle of
127
128
Jun 2009 P 54/95
2
IB5
:
:
0
Last Line
Step = 1
4 (POR)
HSYNC
255
256
IB4
1
2
3
:
:
Set by VFP[6:0]
0
IB3
0
Dummy Lines
IB2
Rev 1.4
0
IB1
1
SSD2119
IB0
1