ADN2807 Analog Devices, Inc., ADN2807 Datasheet - Page 4

• Manufacturer Part Number: ADN2807
• Description: 155/622 Mb/s Clock And Data Recovery Ic With Integrated Limiting Amp
• Manufacturer: Analog Devices, Inc.

ADN2807
Parameter
PHASE-LOCKED LOOP CHARACTERISTICS
CML OUTPUTS (CLKOUTP/N, DATAOUTP/N)
REFCLK DC INPUT CHARACTERISTICS
TEST DATA DC INPUT CHARACTERISTICS
LVTTL DC INPUT CHARACTERISTICS
LVTTL DC OUTPUT CHARACTERISTICS
1
2
3
4
5
PIN and NIN should be driven differentially, ac-coupled for optimum sensitivity.
PWD measurement made on quantizer outputs in BYPASS mode.
Jitter tolerance measurements are equipment limited.
TDINP/N are CML inputs. If the drivers to the TDINP/N inputs are anything other than CML, they must be ac-coupled.
SEL0 and SEL1 have internal pull-down resistors, causing higher I
Jitter Transfer BW
Jitter Peaking
Jitter Generation
Jitter Tolerance
Single-Ended Output Swing
Differential Output Swing
Output High Voltage
Output Low Voltage
Rise Time
Fall Time
Setup Time
Hold Time
Input Voltage Range
Peak-to-Peak Differential Input
Common-Mode Level
(TDINP/N)
Peak-to-Peak Differential Input Voltage
Input High Voltage
Input Low Voltage
Input Current
Input Current (SEL0 and SEL1 Only)
Output High Voltage
Output Low Voltage
5
4
Conditions
PIN–NIN = 10 mV p-p
OC-12
OC-3
OC-12
OC-3
OC-12, 12 kHz to 5 MHz
OC-3, 12 kHz to 1.3 MHz
OC-12
30 Hz
300 Hz
25 kHz
250 kHz
OC-3
30 Hz
300 Hz
6500 Hz
65 kHz
V
V
V
V
20% to 80%
80% to 20%
T
OC-12
OC-3
T
OC-12
OC-3
@ REFCLKP or REFCLKN
DC-coupled, single-ended
CML inputs
V
V
V
V
V
V
IH
S
H
SE
DIFF
OH
OL
IH
IL
IN
IN
OH
OL
.
(See Figure 3)
(See Figure 3)
, referred to VCC
= 0.4 V or V
= 0.4 V or V
, I
(See Figure 7)
, I
(See Figure 7)
OL
OH
3
3
3
3
= +2.0 mA
= –2.0 mA
3
Rev. A | Page 4 of 20
IN
IN
= 2.4 V
= 2.4 V
Min
100
44
5.8
1.0
50
23.5
6.0
1.0
400
850
–0.60
750
3145
750
3150
0
100
2.0
–5
–5
2.4
Typ
140
48
0.004
0.002
0.02
0.02
488
975
VCC
VCC/2
0.8
Max
200
85
0.003
0.04
0.002
0.04
540
1100
–0.30
150
150
VCC
0.8
+5
+50
0.4
Unit
kHz
kHz
dB
dB
UI rms
UI p-p
UI rms
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
mV
mV
V
V
ps
ps
ps
ps
ps
ps
V
mV
V
V
V
V
µA
µA
V
V