ADN2530 Analog Devices, Inc., ADN2530 Datasheet - Page 13

• Manufacturer Part Number: ADN2530
• Description: 11.3 Gbps, Active Back-termination, Differential Vcsel Driver
• Manufacturer: Analog Devices, Inc.

LOAD MISTERMINATION
Due to its excellent S22 performance, the ADN2530 can drive
differential loads that range from 35 Ω to 140 Ω. In practice,
many TOSAs have differential resistance not equal to 100 Ω. In
this case, with 100 Ω differential transmission lines connecting
the ADN2530 to the load, the load end of the transmission lines
are misterminated. This mistermination leads to signal reflections
back to the driver. The excellent back-termination in the
ADN2530 absorbs these reflections, preventing their reflection
back to the load. This enables excellent optical eye quality to
be achieved even when the load end of the transmission lines is
significantly misterminated. The connection between the load
and the ADN2530 must be made with 100 Ω differential (50 Ω
single-ended) transmission lines so that the driver end of the
transmission lines is properly terminated.
CROSSPOINT ADJUST
The crossing level in the output electrical eye diagram can be
adjusted between 35% and 65% using the crosspoint adjust (CPA)
control input. This can be used to compensate for asymmetry in
the VCSEL response and optimizes the optical eye mask margin.
The CPA input is a voltage control input, and a plot of eye cross-
point vs. CPA control voltage is shown in Figure 15 and Figure 16
in the Typical Performance Characteristics section. The equivalent
circuit for the CPA pin is shown in Figure 36. To disable the
crosspoint adjust function and set the eye crossing to 50%, the
CPA pin should be tied to VCC.
Figure 36. Equivalent Circuit for CPA Pin
VCC
CPA
100Ω
Rev. A | Page 13 of 20
POWER CONSUMPTION
The power dissipated by the ADN2530 is given by
where:
VCC is the power supply voltage.
IBIAS is the bias current generated by the ADN2530.
V
I
IMODP, and IMODN pins of the ADN2530 when IBIAS =
IMOD = 0 expressed in amps (see Table 1).
V
Considering VBSET/IBIAS = 50 as the conversion factor from
V
To ensure long-term reliable operation, the junction tempera-
ture of the ADN2530 must not exceed 125°C, as specified in
Table 2. For improved heat dissipation, the module’s case can be
used as a heat sink, as shown in Figure 37.
PACKAGE
PCB
SUPPLY
MSET
IBIAS
BSET
THERMAL COMPOUND
DIE
COPPER PLANE
P
P
to IBIAS, the dissipated power becomes
is the average voltage on the IBIAS pin.
is the voltage applied to the MSET pin.
is the sum of the current that flows into the VCC,
=
=
VCC
VCC
Figure 37. Typical Optical Module Structure
×
×
⎛
⎜
⎝
⎛
⎜
⎝
V
V
MSET
MSET
50
50
VIAS
+
T
+
TOP
I
I
MODULE CASE
SUPPLY
SUPPLY
T PAD
T
J
⎞
⎟
⎠
⎞
⎟
⎠
+
+
V
V
IBIAS
IBIAS
×
×
(
⎛
⎜
⎝
IBIAS
V
BSET
50
THERMO-COUPLE
ADN2530
×
×
. 1
1
) 2
2 .
⎞
⎟
⎠