OM6213 NXP Semiconductors, OM6213 Datasheet - Page 11

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OM6213

Manufacturer Part Number
OM6213
Description
Om6213 48 X 84 Pixels Matrix Lcd Driver
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
11 INSTRUCTIONS
The instruction format is divided into two modes. If D/C
(mode select) is set LOW the current byte is interpreted as
command byte (see Table 1). If D/C is set HIGH the
following bytes are stored in the DDRAM. After every data
byte the address counter is incremented automatically.
The level of the D/C signal is read during the last bit of the
data byte.
Instructions can be sent in any order to the OM6213 (the
exception being that the temperature control command
must be followed by at least one byte of data or command).
The MSB is transmitted first (see Fig.7). Figure 8 shows an
example of a command stream, used to set-up the LCD
driver.
The serial interface is initialized when SCE is HIGH. In this
state SCLK clock pulses have no effect and no power is
consumed by the serial interface. A negative edge on SCE
enables the serial interface and indicates the start of a data
transmission.
Figures 9 and 10 show the serial bus protocol.
2001 Nov 07
handbook, full pagewidth
48
84 pixels matrix LCD driver
function set (H = 1)
handbook, halfpage
function set (H = 0)
bias system
MSB (DB7)
Fig.7 General format of data stream.
Fig.8 Serial data stream, example.
data
display control
set V PR
LSB (DB0)
11
data
When SCE is HIGH, SCLK clocks are ignored. During
the HIGH time of SCE the serial interface is initialized
(see Fig.11).
SDIN is sampled at the positive edge of SCLK
D/C indicates whether the byte is a command (D/C = 0)
or RAM data (D/C = 1). It is read with the eighth SCLK
pulse.
If SCE stays LOW after the last bit of a command/data
byte, the serial interface expects bit DB7 of the next byte
at the next rising edge of SCLK (see Fig.11)
A reset pulse with RES interrupts the transmission. The
data being written into the RAM may be corrupted. The
registers are cleared. If SCE is LOW after the rising
edge of RES, the serial interface is ready to receive the
D/C bit of a command/data byte (see Fig.12).
Instructions (except the temperature control command)
are executed on the SCLK positive edge which latches
DB0 and D/C
SCLK positive edge which latches DB0 and D/C of the
next command or the next write to the DDRAM
(whichever occurs first).This command requires 2 bytes
to be executed.
The temperature control command is executed on the
temperature control
Y address
MGT639
X address
MGT846
Product specification
OM6213

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