IXDF502 IXYS, IXDF502 Datasheet - Page 4

• Manufacturer Part Number: IXDF502
• Description: (IXDx502) 2 Ampere Dual Low-Side Ultrafast MOSFET Drivers
• Manufacturer: IXYS

Notes:
1. Operating the device beyond the parameters listed as “Absolute Maximum Ratings” may cause permanent
2. The device is not intended to be operated outside of the Operating Ratings.
3. Electrical Characteristics provided are associated with the stated Test Conditions.
4. Typical values are presented in order to communicate how the device is expected to perform, but not necessarily
*
1) The θ
resistance of the package, and the IXD_5XX are typical. The values for these packages are natural convection values with vertical boards
and the values would be lower with forced convection. For the 6-Lead DFN package, the θ
soldered on a PCB. The θ
thermal resistance to the die, it is easy to reduce the θ
the θ
vary significantly with size, construction, layout, materials, etc. This typical range tells the user what he is likely to get if he does no
thermal management.
2) θ
published for the PDIP and SOIC packages. The θ
the die attach pad on the back of the DFN, -- and a guardband has been added to be safe.
3) The θ
The value must be typical because there are a variety of thermal substrates. This value was calculated based on easily available IMS in the
U.S. or Europe, and not a premium Japanese IMS. A 4 mil dialectric with a thermal conductivity of 2.2W/mC was assumed. The result was
given as typical, and indicates what a user would expect on a typical IMS substrate, and shows the potential low thermal resistance for the
DFN package.
Unless otherwise noted, 4.5V ≤ V
All voltage measurements with respect to GND. IXD_502 configured as described in Test Conditions. All specifications are for one channel.
Copyright © 2007 IXYS CORPORATION All rights reserved
Electrical Characteristics @ temperatures over -55
Symbol
V
V
V
I
V
V
R
R
I
t
t
t
t
V
I
IN
DC
R
F
ONDLY
OFFDLY
CC
The following notes are meant to define the conditions for the θ
damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device
to highlight any specific performance limits within which the device is guaranteed to function.
IH
IL
IN
OH
OL
CC
OH
OL
reliability.
J-C
J-A
(max) is defined as juction to case, where case is the large pad on the back of the DFN package. The θ
(typ) to 125 ° C/W easily, and potentially even lower. The θ
J-A
J-S
(typ) is defined as junction to ambient. The θ
(typ) is defined as junction to heatsink, where the DFN package is soldered to a thermal substrate that is mounted on a heatsink.
Parameter
High input voltage
Low input voltage
Input voltage range
Input current
High output voltage
Low output voltage
High state output
resistance
Low state output
resistance
Continuous output
current
Rise time
Fall time
On-time propagation
delay
Off-time propagation
delay
Power supply voltage
Power supply current
J-A
(typ) is 200 ° C/W with no special provisions on the PCB, but because the center pad provides a low
CC
≤ 30V , Tj < 150
Test Conditions
4.5V ≤ V
4.5V ≤ V
0V ≤ V
V
V
C
C
C
C
V
V
V
J-C
o
CC
CC
IN
IN
IN
C
LOAD
LOAD
LOAD
LOAD
for the DFN packages are important to show the low thermal resistance from junction to
= + V
= 3.5V
= 0V
= 15V
= 15V
J-A
=1000pF V
=1000pF V
=1000pF V
=1000pF V
J-A
IN
of the standard single die 8-Lead PDIP and 8-Lead SOIC are dominated by the
CC
CC
≤ V
CC
by adding connected copper pads or traces on the PCB. These can reduce
≤ 15V
≤ 15V
CC
J-A
, θ
J-A
4
J-C
CC
CC
CC
CC
IXDF502 / IXDI502 / IXDN502
for DFN on PCB without heatsink or thermal management will
and θ
=15V
=15V
=15V
=15V
J-S
o
C to 125
values:
V
CC
Min
-10
- 0.025
3.1
4.5
-5
J-A
o
C
value supposes the DFN package is
(3)
Typ
15
1
0
J-C
values are generally not
V
CC
0.025
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Max
0.8
10
11
10
40
38
30
40
40
+ 0.3
6
5
1
3
Units
mA
µA
µA
µA
ns
ns
ns
ns
Ω
Ω
V
V
V
V
V
A
V