MB15F02L Fujitsu Media Devices, MB15F02L Datasheet - Page 10

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MB15F02L

Manufacturer Part Number
MB15F02L
Description
Dual Serial Input PLL Frequency Synthesizer
Manufacturer
Fujitsu Media Devices
Datasheet

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10
MB15F02L
3. Power Saving Mode (Intermittent Mode Control Circuit)
Setting a PS
be limited to 10 A (typ.). Setting PS pin to High, power saving mode is released so that the device works normally.
In addition, the intermittent operation control circuit is included which helps smooth start up from stand by mode.
In general, the power consumption can be saved by the intermittent operation that powering down or waking up the
synthesizer. Such case, if the PLL is powered up uncontrolled, the resulting phase comparator output signal is
unpredictable due to an undefined phase relation between reference frequency (fr) and comparison frequency (fp)
and may in the worst case take longer time for lock up of the loop.
To prevent this, the intermittent operation control circuit enforces a limited error signal output of the phase detector
during power up. Thus keeping the loop locked.
PS pin must be set “L” at Power-ON.
Allow 1 s after frequency stabilization on power-up for exiting the power saving mode (PS: L to H)
Serial data can be entered during the power saving mode.
During the power saving mode, the corresponding section except for indispensable circuit for the power saving
function stops working, then current consumption is reduced to 10 A per one PLL section.
At that time, the Do and LD become the same state as when a loop is locking. That is, the Do becomes high
impedance.
A VCO control voltage is naturally kept at the locking voltage which defined by a LPF’s time constant. As a result
of this, VCO’s frequency is kept at the locking frequency.
PS
H
H
L
L
IF
(1) PS = L (power saving mode) at Power-ON
(2)Set serial data after power supply remains stable.
(3)Release saving mode(PS : L
Clock
Data
V
LE
PS
CC
IF(RF)
PS
pin to Low, IF-PLL (RF-PLL) enters into power saving mode resultant current consumption can
H
H
L
L
RF
IF-PLL counters
(1)
OFF
OFF
ON
ON
H) after setting serial data.
RF-PLL counters
(2)
OFF
OFF
ON
ON
ON
OSC input buffer
OFF
ON
ON
ON
(3)

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