CMX625D5 CML Microcircuits, CMX625D5 Datasheet - Page 19

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CMX625D5

Manufacturer Part Number
CMX625D5
Description
ISDN TA POTS Interface
Manufacturer
CML Microcircuits
Datasheet
ISDN TA POTS Interface
1.5.13 DTMF Tone Decoder
This block is enabled or disabled by bit 5 of the SETUP register. If disabled, bit 4 and 5 of the STATUS
Register and bit 0 to bit 3 of the DTMF RX DATA Register are set to ‘0’ and no interrupts are generated.
When enabled (set to ‘1’), a status change of the decoder will generate an interrupt when the
INTERRUPT MASK Register bit 5 is unmasked (logic ‘1’) and bit 5 of the STATUS Register will be set to
shown below:
A status change of the decoder and the generation of an interrupt (when the INTERRUPT MASK Register
bit 5 is unmasked) will occur both when a tone is first decoded and also when a tone, which was
previously present, is no longer decoded. In the latter case, bit 4 of the STATUS Register will be set to
‘0’ to indicate that no tone was detected.
2000 Consumer Microcircuits Limited
Bit 3
(D3)
DTMF RX DATA Register Bits 0 - 3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit 2
(D2)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit 1
(D1)
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
dicated by bit 4 of the STATUS Register. The decode truth table is
Bit 0
(D0)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Lower Frequency
19
(Hz)
941
697
697
697
770
770
770
852
852
852
941
941
941
697
770
852
DTMF Tone Pairs
Upper Frequency
1633
1209
1336
1477
1209
1336
1477
1209
1336
1477
1336
1209
1477
1633
1633
1633
(Hz)
Keypad
Legend
D
C
A
B
1
2
3
4
5
6
7
8
9
0
#
*
CMX625
D/625/1

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