GS1503 Gennum Corporation, GS1503 Datasheet - Page 20

• Manufacturer Part Number: GS1503
• Description: HD Embedded Audio Codec
• Manufacturer: Gennum Corporation

1.5.7 TRS Word Insertion
When TRS_INS bit 0 of Host Interface register 008h is set
HIGH, the GS1503 will insert TRS codes into the video data
stream. When set LOW, existing TRS codes will remain in
the output video stream.
Register Settings
1.6 AUDIO DATA PROCESSING
1.6.1 Digital Audio Input Format
The GS1503 will accept two audio input formats, AES/EBU
digital audio input and serial input, as listed in Table 3.
Serial input can be formatted in the following two modes.
See Figure 19:
24-bit Left Justified; MSB first
24-bit Right Justified; MSB last
The audio input format is configured using the AM[1:0]
external pins or via AM[1:0] bits 1-0 in Host Interface
register 010h. To configure the audio input format via the
Host Interface, AM_SEL bit 7 in Host Interface register 010h
must be set HIGH. The GS1503 will default to the AM[1:0]
external pin setting.
Register Settings
WCINA/WCINB
(AES/EBU)
TRS_INS
MODE0
MODE1
MODE2
NAME
AM_SEL
AM[1:0]
NAME
23
MSB
0
Preamble
Sync
TRS word insertion (1: Enabled)
3 4
0: External pin setting
1: Register setting
Audio input format selection (AM[1] is MSB)
LSB
0
24-bit Audio Sample Word
DESCRIPTION
DESCRIPTION
Channel 1
Channel Status Bit
User Data Bit
Fig. 19 Audio Input Formats
Validity Bit
Parity Bit
0
2728293031
20
V U C P
When EXT_SEL bit 3 of Host Interface register 001h is set
HIGH, TRS codes will be inserted based on the timing of
EXTH and EXTF input signals.
Table 3: Audio Input Formats
23
AM[1:0]
23
MSB
0
Preamble
0
1
2
Sync
ADDRESS
ADDRESS
3 4
010
008
Serial audio input: 24-bit Left Justified; MSB first
Serial audio input: 24-bit Right Justified; MSB last
AES/EBU audio input
LSB
0
BIT
24-bit Audio Sample Word
1-0
7
BIT
AUDIO INPUT FORMAT
0
Channel 2
SETTING
Table 3
SETTING
See
1
1
0
2728293031
DEFAULT
DEFAULT
V U C P
15879 - 1
0
0
1
23