GS1503-CFZ Gennum Corp., GS1503-CFZ Datasheet - Page 60

• Manufacturer Part Number: GS1503-CFZ
• Description: HD EMBEDDED AUDIO CODEC
• Manufacturer: Gennum Corp.

Table 14: Demultiplex Mode Host Interface Registers
CONTROL
Video
ITEM
CRC_CNT[11:0]
DSCBYPASS
SCRBYPASS
VIDEO_DET
HBLK_INS
CRC_ERR
VBLK_INS
8BIT_SEL
CRC_INS
EXT_SEL
VM_SEL
VM[3:0]
NAME
RSV
Video input format (external pin/internal register)
configuration select. When set LOW, the video input
format is configured via the VM[3:0] pins.
When set HIGH, the video input format is
configured via the "VM[3:0]" bits.
Video signal detection flag. Set HIGH when 3
consecutive TRS are detected in the input video
signal.
Video input signal CRC error detection. Set HIGH
when a CRC error is detected in the input video
signal. This register is refreshed on every video
frame.
Video CRC insertion. When set HIGH, the Luma and
Chroma line CRC words are re-calculated and
inserted into the output video signal.
Video input format selection. See Table 10. Valid
when "VM_SEL" is HIGH.
External EXTH/EXTF input select. When set LOW,
the EXTH and EXTF pins are configured as outputs.
When set HIGH, the GS1503 will insert TRS and
Line Numbers based on signals input at the EXTH
and EXTF pins.
Scramble processing bypass select.
When set HIGH, the internal scrambler and NRZ(I)
encoder is bypassed.
NOTE: The status of the SCRBYPASS external pin is
not updated in this register. The value programmed
in this register is logical OR'd with the SCRBYPASS
external pin setting.
8-bit input selection. When set HIGH, the GS1503
will accept an 8-bit input video signal.
Descramble process bypass select.
When set HIGH, the internal SMPTE 292M
descrambler is bypassed.
NOTE: The status of the DSCBYPASS external pin is
not updated in this register. The value programmed
in this register is logical OR'd with the DSCBYPASS
external pin setting.
CRC error accumulation. Reports the accumulated
number of CRC errors in one video frame.
Not used.
Vertical blanking enable. When set HIGH, the
output video vertical blanking will be set to 040h for
the Luma channel and 200h for the Chroma
channel.
Horizontal blanking enable. When set HIGH, the
output video horizontal blanking, including TRS,
line numbers and line CRC words, will be set to
040h for the Luma channel and 200h for the
Chroma channel.
NOTE: If blanking of line numbers and TRS words
is required, LN_INS and TRS_INS must be set
LOW.
DESCRIPTION
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ADDRESS
000
001
006
007
008
BIT
3-0
3-0
7-0
7-4
7
6
5
4
3
2
1
0
3
2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
DEFAULT
15879 - 4
0
0
0
1
0
0
0
0
0
0
0
0
0