S1D15605D11B Epson Company, S1D15605D11B Datasheet - Page 51

• Manufacturer Part Number: S1D15605D11B
• Description: Single-chip dot matrix liquid crystal display drivers
• Manufacturer: Epson Company

7. COMMANDS
The S1D15605 Series chips identify the data bus signals by a combination of A0, RD (E), WR (R/W) signals. Command
interpretation and execution does not depend on the external clock, but rather is performed through internal timing only,
and thus the processing is fast enough that normally a busy check is not required.
In the 8080 MPU interface, commands are launched by inputting a low pulse to the RD terminal for reading, and
inputting a low pulse to the WR terminal for writing. In the 6800 Series MPU interface, the interface is placed in a read
mode when an HIGH signal is input to the R/W terminal and placed in a write mode when a LOW signal is input to the
R/W terminal and then the command is launched by inputting a high pulse to the E terminal. (See “10. Timing
Characteristics” regarding the timing.) Consequently, the 6800 Series MPU interface is different than the 80x86 Series
MPU interface in that in the explanation of commands and the display commands the status read and display data read
RD (E) becomes “1(H)”. In the explanations below the commands are explained using the 8080 Series MPU interface
as the example.
When the serial interface is selected, the data is input in sequence starting with D7.
<Explanation of Commands>
(1) Display ON/OFF
This command turns the display ON and OFF.
When the display OFF command is executed when in the display all points ON mode, power saver mode is entered. See
the section on the power saver for details.
(2) Display Start Line Set
This command is used to specify the display start line address of the display data RAM shown in Figure 4. For further
details see the explanation of this function in “The Line Address Circuit”.
(3) Page Address Set
This command specifies the page address corresponding to the low address when the MPU accesses the display data
RAM (see Figure 4). Specifying the page address and column address enables to access a desired bit of the display data
RAM. Changing the page address does not accompany a change in the status display. See the page address circuit in
the Function Description (page 1–20) for the detail.
Rev. 2.4a
A0
A0
A0
0
0
0
RD WR D7 D6 D5 D4 D3 D2 D1 D0
RD WR D7 D6 D5 D4 D3 D2 D1 D0
RD WR D7 D6 D5 D4 D3 D2 D1 D0
E
E
E
1
1
1
R/W
R/W
R/W
0
0
0
1
0
1
0
1
0
1
0
0
0
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
0
0
1
1
1
0
0
0
1
1
0
0
0
1
0
1
0
0
1
1
1
0
0
1
1
0
EPSON
1
0
0
1
0
0
1
0
1
0
1
0
Page address
Line address
Display OFF
Display ON
Setting
62
63
0
1
2
0
1
2
7
8
S1D15605 Series
8–49