ADP3160 Analog Devices, ADP3160 Datasheet - Page 10

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ADP3160

Manufacturer Part Number
ADP3160
Description
5-Bit Programmable 2-Phase Synchronous Buck Controller
Manufacturer
Analog Devices
Datasheet

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ADP3160/ADP3167
R
The value of R
current. The current comparator of the ADP3160 has a mini-
mum current limit threshold of 142 mV. Note that the 142 mV
value cannot be used for the maximum specified nominal current,
as headroom is needed for ripple current and tolerances.
The current comparator threshold sets the peak of the inductor
current yielding a maximum output current, I
twice the peak inductor current value less half of the peak-to-
peak inductor ripple current. From this the maximum value of
R
In this case, 4 mW was chosen as the closest standard value.
Once R
where current limit is reached, I
the maximum current sense threshold of 172 mV:
At output voltages below 425 mV, the current sense threshold is
reduced to 95 mV, and the ripple current is negligible. There-
fore, at dead short the output current is reduced to:
To safely carry the current under maximum load conditions, the
sense resistor must have a power rating of at least:
where:
In this formula, n is the number of phases, and is the converter
efficiency, in this case assumed to be 85%. Combining Equations 9
and 10 yields:
Power MOSFETs
In the standard 2-phase application, two pairs of N-channel
power MOSFETs must be used with the ADP3160 and
ADP3412, one pair as the main (control) switches and the
other pair as the synchronous rectifier switches. The main
selection parameters for the power MOSFETs are V
and R
age to the ADP3412) dictates whether standard threshold or
logic-level threshold MOSFETs must be used. Since V
logic-level threshold MOSFETs (V
recommended.
The maximum output current I
ment for the power MOSFETs. When the ADP3160 is operating
in continuous mode, the simplifying assumption can be made
SENSE
SENSE
2
P
P
R
I
I
I
OUT CL
OUT SC
SENSE RMS
DS(ON)
R
R
SENSE
¥
is calculated as:
SENSE
SENSE
SENSE
172
(
4
(
(
=
=
m
. The minimum gate drive voltage (the supply volt-
)
£
mV
)
has been chosen, the output current at the point
W
= ¥
I
53 4
SENSE
= ¥
SENSE RMS
I
)
2
2
V
O
2
2
.
2
CS CL
=
+
A
12 2
95
(
(
V
4
I
is based on the maximum required output
I
2
O
n
L RIPPLE
CS CL MAX
.
m
¥
2
(
mV
)(
R
(
W
MIN
)
¥
2
A
0 85 12
2
SENSE
.
h
¥
=
V
)(
1 7
=
)
R
¥
.
OUT
73 8
)
47 5
¥
V
O
SENSE
V
=
OUT(CL)
.
IN
determines the R
.
26 7
)
V
A
GS(TH)
A
.
142
¥
I
L RIPPLE
A
, can be calculated using
4
(
m
+
mV
< 2.5 V) are strongly
W =
6 1
.
O
, which equals
A
950
)
DS(ON)
=
=
4 3
mW
GATE
.
require-
m
GS(TH)
W
< 8 V,
(10)
(6)
(7)
(8)
(9)
–10–
that in each phase one of the two MOSFETs is always conduct-
ing the average inductor current. For V
V
The duty ratio of the low-side (synchronous rectifier) MOSFET is:
The maximum rms current of the high-side MOSFET during
normal operation is:
The maximum rms current of the low-side MOSFET during
normal operation is:
The R
dissipation. If 10% of the maximum output power is allowed for
MOSFET dissipation, the total dissipation in the four MOSFETs
of the 2-phase converter will be:
Allocating half of the total dissipation for the pair of high-side
MOSFETs and half for the pair of low-side MOSFETs, and
assuming that the resistive and switching losses of the high-side
MOSFET are equal, the required maximum MOSFET resis-
tances will be:
Note that there is a trade-off between converter efficiency and
cost. Larger MOSFETs reduce the conduction losses and allow
higher efficiency, but increase the system cost. If efficiency is
not a major concern, a Fairchild FDB7030L (R
nominal, 10 mW worst case) for the high-side and a Fairchild
FDB8030L (R
for the low-side are good choices. The high-side MOSFET
dissipation is:
where the second term represents the turn-off loss of the
MOSFET and the third term represents the turn-on loss due to
the stored charge in the body diode of the low-side MOSFET.
(In the second term, Q
the gate for turn-off and I
P
P
OUT
MOSFET TOTAL
MOSFET TOTAL
V
D
R
R
R
R
P
D
I
I
= 1.6 V, the duty ratio of the high-side MOSFET is:
HSF MAX
DS(ON)
LSF MAX
HSF
DS ON HS MAX
DS ON HS MAX
DS ON LS MAX
DS ON LS MAX
LSF
IN
HSF
(
(
(
(
(
(
(
(
¥
=
=
=
I
for each MOSFET can be derived from the allowable
)
)
)
)
1
L PK
V
(
V
R
(
)
)
OUT
DS(ON)
2
(
(
(
(
DS ON HS
IN
=
=
D
)
)
¥
)
HSF
I
=
=
I
(
2
I
HSF MAX
¥
O
= 13 3 . %
G
0 1
0 1 1 57
)
)
Q
.
.
)
)
= 3.1 mW nominal, 5.6 mW worst case)
=
=
)
=
(
=
=
G
G
D
¥
¥
86 7
P
4
HSF
P
8
V
¥
is the gate charge to be removed from
4
8
MOSFET TOTAL
G
MOSFET TOTAL
¥
¥
.
MIN
¥
. %
8 4
¥
¥
f
)
8 4
is the gate turn-off current. From
SW
(
.
I
( .
.
I
25
I
¥
9 8
2
2
V
2
D
D
W
HFS MAX
Ê
Á
Ë
LSF MAX
HSF MAX
W
¥
1
HSF
LSF
A
+
¥
I
A
+
(
(
)
O
(
(
(
53 4
2
V
(
)
2
I
IN
=
2
= 25
.
3
=
L RIPPLE
3 4
(
IN
¥
11
¥
)
.
A
)
)
)
)
)
Q
I
= 12 V and
A
+
2
m
=
m
RR
O
W
8 4
W
)
.
¥
ˆ
˜ =
¯
DS(ON)
W
f
SW
9 8
.
)
= 7 mW
A
REV. B
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)

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