OPA643 Burr-Brown, OPA643 Datasheet - Page 15

• Manufacturer Part Number: OPA643
• Description: Wideband Low Distortion / High Gain OPERATIONAL AMPLIFIER
• Manufacturer: Burr-Brown

FIGURE 10. DC Coupled, Inverting Gain of –4, with
Operating junction temperature (T
quiescent power (P
the output stage (P
power is simply the specified no-load supply current times
the total supply voltage across the part. P
the required output signal and load but would, for a grounded
resistive load, be at a maximum when the output is fixed at
a voltage equal to 1/2 either supply voltage (for equal bipolar
supplies). Under this condition P
includes feedback network loading.
Note that it is the power in the output stage and not into the
load that determines internal power dissipation.
As a worst case example, compute the maximum T
OPA643N (SOT23-5 package) in the circuit of Figure 1
operating at the maximum specified ambient temperature of
+85 C. P
335mW. Maximum T
135 C.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a high frequency
amplifier like the OPA643 requires careful attention to
board layout parasitics and external component types.
Recommendations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for
JA
10k
all of the signal I/O pins. Parasitic capacitance on the
output and inverting input pins can cause instability; on
the non-inverting input, it can react with the source
impedance to cause unintentional bandlimiting. To reduce
unwanted capacitance, a window around the signal I/O
pins should be opened in all of the ground and power
planes around those pins. Otherwise, ground and power
planes should be unbroken elsewhere on the board.
. The total internal power dissipation (P
+5V
–5V
D
5k
5k
= 10V • 26mA + 5
Output Offset Adjustment.
V
I
0.1µF
0.1µF
DQ
DL
) and additional power dissipated in
J
) to deliver load power. Quiescent
250
= +85 C + (0.335
20k
R
G
200
DL
2
/(4 • (100
±200mV Output Adjustment
J
= V
) is given by T
OPA643
V
V
+5V
–5V
O
I
S
= –
1k
2
Supply Decoupling
R
/(4 • R
DL
F
R
R
D
G
Not Shown
F
will depend on
) is the sum of
= –4
• 150 C/W) =
L
|| 502 )) =
) where R
J
A
using an
+ P
V
D
O
L
•
15
b) Minimize the distance (< 0.25") from the power supply
c) Careful selection and placement of external
d) Connections to other wideband devices on the board
pins to high frequency 0.1 F decoupling capacitors. At
the device pins, the ground and power plane layout
should not be in close proximity to the signal I/O pins.
Avoid narrow power and ground traces to minimize
inductance between the pins and the decoupling capacitors.
The primary power supply connections (on pins 4 and 7)
should always be decoupled with these capacitors.
Optional output stage power supply connections on pins
5 and 8 may be used to get a slight improvement in
harmonic distortion and settling time (for the 8-pin
packaged parts). Place additional 0.1 F decoupling
capacitors very near to these pins to improve performance.
Larger (2.2 F to 6.8 F) decoupling capacitors, effective
at lower frequency, should also be used on the main
supply pins. These may be placed somewhat farther from
the device and may be shared among several devices in
the same area of the PC board.
components will preserve the high frequency
performance of the OPA643. Resistors should be a very
low reactance type. Surface mount resistors work best
and allow tighter overall layout. Metal film and carbon
composition axially leaded resistors can also provide
good high frequency performance. Again, keep their
leads and PC board trace length as short as possible.
Never use wirewound type resistors in a high frequency
application. Since the output pin and inverting input pin
are the most sensitive to parasitic capacitance, always
position the feedback and series output resistor, if any, as
close as possible to the output pin. Other network
components, such as non-inverting input termination
resistors, should also be placed close to the package.
Where double side component mounting is allowed,
place the feedback resistor directly under the package on
the other side of the board between the output and
inverting input pins. Even with a low parasitic capacitance
shunting the external resistors, excessively high resistor
values can create significant time constants that can
degrade performance. Good axial metal film or surface
mount resistors have approximately 0.2pF in shunt with
the resistor. For resistor values > 1.5k , this parasitic
capacitance can add a pole and/or zero below 500MHz
that can effect circuit operation. Keep resistor values as
low as possible consistent with load driving considerations.
The 402
specifications is a good starting point for design.
may be made with short direct traces or through on-board
transmission lines. For short connections, consider the
trace and the input to the next device as a lumped
capacitive load. Relatively wide traces (50 to 100mils)
should be used, preferably with ground and power planes
opened up around them. Estimate the total capacitive load
and set R
Load. Low parasitic capacitive loads (< 5pF) may not
need an R
to operate with a 2pF parasitic load. Higher parasitic
S
S
from the plot of recommended R
since the OPA643 is nominally compensated
feedback used in the typical performance
OPA643
S
vs Capacitive
®