AD9712BAN Analog Devices, AD9712BAN Datasheet - Page 3

• Manufacturer Part Number: AD9712BAN
• Description: 12-Bit/ 100 MSPS D/A Converters
• Manufacturer: Analog Devices

REV. B
Parameter (Conditions)
POWER SUPPLY
NOTES
10
11
12
13
14
15
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
Positive Supply Voltage (+V
Negative Supply Voltage (–V
Analog-to-Digital Ground Voltage Differential . . . . . . . . 0.5 V
Digital Input Voltages (D
Internal Reference Output Current . . . . . . . . . . . . . . . . 500 A
Control Amplifier Input Voltage Range . . . . . . . . . 0 V to –4 V
Control Amplifier Output Current . . . . . . . . . . . . . . .
Reference Input Voltage Range (V
Analog Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300 C
Storage Temperature Range . . . . . . . . . . . . . –65 C to +150 C
NOTES
1
2
1
2
3
4
5
6
7
8
9
Maximum Junction Temperature
Absolute maximum ratings are limiting values to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability is not necessarily implied. Exposure to absolute maximum rating
conditions for an extended period of time may affect device reliability.
Typical thermal impedances with parts soldered in place: 28-pin plastic DIP:
Cerdip:
flow.
Measured as error in ratio of full-scale current to current through R
Full-scale variations among devices are higher when driving REFERENCE INPUT directly.
Frequency at which the gain is flat 0.5 dB; R
Based on I
Data registered into DAC accurately at this rate; does not imply settling to 12-bit accuracy.
Measured as voltage settling at midscale transition to 0.024%, R
Measured as the time between the 50% point of the falling edge of LATCH ENABLE and the point where the output signal has left a 1 LSB error band
Peak glitch impulse is measured as the largest area under a single positive or negative transient.
Measured with R
Data must remain stable for specified time prior to falling edge of LATCH ENABLE signal.
Data must remain stable for specified time after rising edge of LATCH ENABLE signal.
SFDR is defined as the difference in signal energy between the fundamental and worst case spurious frequencies in the output spectrum window, which is
Supply voltages should remain stable within 5% for normal operation.
108 mA typ on Digital –V
Measured at 5% of +V
around its previous value.
centered at the fundamental frequency and covers the indicated span.
JA
Positive Supply Current (+5.0 V)
Negative Supply Current (–5.2 V)
Nominal Power Dissipation
Power Supply Rejection Radio (PSRR)
AD9712B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to –V
AD9713B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to +V
AD9712B/AD9713BAN/AP/BN/BP . . . . . . . –25 C to +85 C
AD9712B/AD9713BSE/SQ/TE/TQ . . . . . . –55 C to +125 C
AD9712B/AD9713BAN/AP/BN/BP . . . . . . . . . . . . . +150 C
AD9712B/AD9713BSE/SQ/TE/TQ . . . . . . . . . . . . . +175 C
= 37 C/W,
JA
FS
= 32 C/W,
= 128 (V
JC
L
13
= 50
= 10 C/W; 28-pin PLCC:
REF
JC
S
/R
= 10 C/W; LCC:
S
(AD9713B only) and –V
and DAC operating in latched mode.
, 37 mA typ on Analog –V
SET
1
) when using internal amplifier.
–D
S
S
) (AD9713B Only) . . . . . . . +6 V
12
) . . . . . . . . . . . . . . . . . . . . . –7 V
14
, LATCH ENABLE)
2
REF
15
JA
) . . . . . . . . . . . 0 V to –V
1
L
= 41 C/W,
= 50 ; 50% modulation at midscale.
JA
S
Temp
+25 C
Full
+25 C
Full
+25 C
+25 C
= 44 C/W,
(AD9712B or AD9713B) using external reference.
S
.
JC
= 13 C/W. No air
JC
Test
Level
I
VI
I
VI
V
I
L
= 50 .
SET
= 14 C/W;
2.5 mA
(160 A nominal); ratio is nominally 128.
Min
S
S
S
–3–
Model
AD9712BAN
AD9712BBN
AD9712BAP
AD9712BBP
AD9712BSQ/883B
AD9712BSE/883B
AD9712BTQ/883B
AD9712BTE/883B
AD9713BAN
AD9713BBN
AD9713BAP
AD9713BBP
AD9713BSQ/883B
AD9713BSE/883B
AD9713BTQ/883B
AD9713BTE/883B
EXPLANATION OF TEST LEVELS
Test Level
I
II –
III –
IV –
V –
VI –
All Grades
AD9712B
–
Typ
140
728
30
100% production tested.
100% production tested at +25 C, and sample tested at
specified temperatures.
Sample tested only.
Parameter is guaranteed by design and characterization
testing.
Parameter is a typical value only.
All devices are 100% tested at +25 C. 100% production
tested at temperature extremes for extended tempera-
ture devices; sample tested at temperature extremes for
commercial/industrial devices.
Max
178
183
100
Temperature
Range
–25 C to +85 C
–25 C to +85 C
–25 C to +85 C
–25 C to +85 C
–55 C to +125 C
–55 C to +125 C
–55 C to +125 C
–55 C to +125 C
–25 C to +85 C
–25 C to +85 C
–25 C to +85 C
–25 C to +85 C
–55 C to +125 C
–55 C to +125 C
–55 C to +125 C
–55 C to +125 C
ORDERING GUIDE
Min
All Grades
AD9713B
AD9712B/AD9713B
Typ
6
145
784
30
Package
Description
28-Pin PDIP
28-Pin PDIP
28-Pin PLCC
28-Pin PLCC
28-Pin Cerdip
28-Pin LCC
28-Pin Cerdip
28-Pin LCC
28-Pin PDIP
28-Pin PDIP
28-Pin PLCC
28-Pin PLCC
28-Pin Cerdip
28-Pin LCC
28-Pin Cerdip
28-Pin LCC
Max
12
14
184
188
100
Package
Option
N-28
N-28
P-28A
P-28A
Q-28
E-28A
Q-28
E-28A
N-28
N-28
P-28A
P-28A
Q-28
E-28A
Q-28
E-28A
Units
mA
mA
mA
mA
mW
A/V