AD9712BAN Analog Devices, AD9712BAN Datasheet - Page 8

• Manufacturer Part Number: AD9712BAN
• Description: 12-Bit/ 100 MSPS D/A Converters
• Manufacturer: Analog Devices

AD9712B/AD9713B
When the analog frequency (f
integer, the DDS continually uses a small subset of the available
DAC codes. The DNL of the converter is effectively the DNL
error of the codes used, and is typically worse than the error
measured against all available DAC codes. This increase in
DNL is translated into higher harmonic and noise levels at the
output.
Glitch impulse, often considered a figure of merit in DDS appli-
cations, is simply the initial transient response of the DAC as it
moves between two output levels. This nonlinearity is com-
monly associated with external data skew, but this effect is mini-
mized by using the on-board registers of the AD9712B/AD9713B
converters (see Digital Inputs/Timing section). The majority of
the glitch impulse, shown below, is produced as the current in
the R-2R ladder network settles, and is fairly constant over the
full-scale range of the DAC. The fast transients which form the
glitch impulse appear as high-frequency spurs in the output
spectrum.
While it is difficult to predict the effects of glitch on the output
waveform, slew rate limitations translate directly into harmonics.
This makes slew rate the dominant effect in ac linearity of the
DAC. Applications in which the ratio of analog frequency (f
to clock frequency (f
high slew rate and low output capacitance of the AD9712B/
AD9713B devices.
Another concern in DDS applications is the presence of aliased
harmonics in the output spectrum. Aliased harmonics appear as
spurs in the output spectrum at frequencies which are deter-
mined by:
where M and N are integers.
The effects of these spurs are most easily observed in applica-
tions where f
rate. This condition causes the aliased harmonics to fold near
the fundamental output frequency (see Performance Curves.)
TUNING
WORD
A
is nearly equal to an integer fraction of the clock
32
C
) is relatively high will benefit from the
ACCUMULATOR
MfA
NUMERICALLY-CONTROLLED OSCILLATOR
PHASE
A
) is exactly f
Nf
C
SYSTEM
CLOCK
Figure 6. Direct Digital Synthesizer Block Diagram
14
C
/N and N is an even
PHASE-TO-AMPLITUDE
CONVERSION
A
)
–8–
SINE DATA
OUTPUT
Figure 7. AD9712B/AD9713B Glitch Impulse
5mV/div
12
Figure 8. Rise and Fall Characteristics
100
90
10
0%
100
90
200mV/div
10
0%
REGISTER
TTL
12
1ns/div
5ns/div
D
D
1
12
D/A CONVERTER
AD9712B
AD9713B
ENABLE
LATCH
REV. B