AD9857 Analog Devices, AD9857 Datasheet - Page 11

• Manufacturer Part Number: AD9857
• Description: CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter
• Manufacturer: Analog Devices

Single-Tone Mode
A block diagram of the AD9857 operating in the Single-Tone
Mode is shown in Figure 17. In the Single-Tone Mode both the
I and Q data paths are disabled from the 14-bit Parallel Data
Port up to and including the modulator. The PDCLK/FUD
pin is an input and functions as a Frequency Update (FUD)
control signal. This is necessary because the frequency tuning
word is programmed via the asynchronous serial port. The FUD
signal causes the new frequency tuning word to become active.
In Single-Tone Mode, the cosine portion of the DDS serves as
the signal source. The output signal consists of a single frequency
as determined by the tuning word stored in the appropriate control
register, per each profile.
PDCLK/
FUD
AD9857
RESET
CONTROL REGISTERS
SERIAL
PORT
POWER-
DIGITAL
POWER-
DOWN
LOGIC
DOWN
TIMING & CONTROL
PS1
PROFILE
SELECT
LOGIC
PS0
TUNING
WORD
CORE
DDS
32
In the Single-Tone Mode, no 14-bit parallel data is applied to the
AD9857. The internal DDS core is used to produce a single fre-
quency signal according to the tuning word. The single-tone signal
then moves toward the output, where the Inverse SINC filter and
the output scaling can be applied. Finally, the digital single-tone
signal is converted to the analog domain by the 14-bit DAC.
SINC FILTER
INVERSE
M
U
X
SINC
INV
MULTIPLIER
(4
CLOCK
LOCK
M
U
X
– 20 )
PLL
14
OUTPUT
SCALE
VALUE
8
CONTROL
CLOCK
INPUT
MODE
14-BIT
MODE
DAC
DAC_RSET
IOUT
IOUT
REFCLK
REFCLK
AD9857