AD9215-65 Analog Devices, AD9215-65 Datasheet - Page 6
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AD9215-65
Manufacturer Part Number
AD9215-65
Description
10-Bit, 65/80/105 MSPS 3.3 V A/D Converter
Manufacturer
Analog Devices
Datasheet
1.AD9215-65.pdf
(13 pages)
AD9215
TSSOP
Pin No.
1
2
3
4
5
6
7, 12
8, 11
9
10
13
14
17–22, 25–28
23
24
15-16
Figure 2. Equivalent Analog Input Circuit
Figure 3. Equivalent MODE Input Circuit
MODE
MODE
LFCSP
Pin No.
21
22
23
24
25
26
27, 32
28, 31
29
30
2
4
9–14, 17–20
15
16
1, 3, 5–8
PDWN 4
CLK 2
NC 1
NC 3
NC 5
NC 6
NC 7
NC 8
NC = NO CONNECT
20k
20k
AVDD
AVDD
PRELIMINARY TECHNICAL DATA
PIN 1
INDICATOR
AD9215
TOP VIEW
CP-32
Mnemonic
OR
MODE
SENSE
VREF
REFB
REFT
AVDD
AGND
VIN+
VIN–
CLOCK
PDWN
D0 (LSB)–D9 (MSB)
DRGND
DRVDD
NC
20k
24 VREF
23 SENSE
22 MODE
21 OTR
20 D9
19 D8
18 D7
17 D6
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATIONS
Description
Out-of-Range Indicator
Data Format and Clock Duty Cycle Stabilizer (DCS) Mode selection
Reference Mode Selection
Voltage Reference Input/Output
Differential Reference (Negative)
Differential Reference (Positive)
Analog Power Supply
Analog Ground
Analog Input Pin (+)
Analog Input Pin (–)
Clock Input Pin
Power-Down Function Selection (Active High)
Data Output Bits
Digital Output Ground
Digital Output Driver Supply. Must be decoupled to DRGND with a
minimum 0.1 µF capacitor. Recommended decoupling is 0.1 µF in
parallel with 10 µF.
Not internally connected
–6–
CLOCK
Figure 4. Equivalent Digital Output Circuit
SENSE
MODE
PDWN
AGND
AGND
Figure 5. Equivalent Digital Input Circuit
VREF
REFB
AVDD
AVDD
REFT
VINA
VINB
OTR
CLOCK
10
12
13
11
14
NC = NO CONNECT
1
2
3
4
5
6
7
8
9
(Not to Scale)
DRVDD
TOP VIEW
AD9215
RU-28
2.6k
2.6k
22
19
18
17
16
15
28
27
26
25
24
23
21
20
AVDD
D9 (MSB)
D8
D7
D6
DRVDD
DRGND
D5
D4
D3
D2
D1
D0 (LSB)
NC
NC
D11–D0,
OTR
REV. PrA