LM5035A-1 National Semiconductor, LM5035A-1 Datasheet - Page 20

• Manufacturer Part Number: LM5035A-1
• Description: PWM Controller
• Manufacturer: National Semiconductor

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If the current sense resistor method is used, the over-current
condition will only be sensed while LO is driving the low-side
MOSFET. Over-current while HO is driving the high-side
MOSFET will not be detected. In this configuration, it will take
4 times as long for continuous cycle-by-cycle current limiting
to initiate a restart event since each over-current event during
LO enables the 22µA RES pin current source for one oscillator
period, and then the lack of an over-current event during HO
enables the 12µA RES pin current sink for one oscillator pe-
riod. The time average of this toggling is equivalent to a
continuous 5 µA current source into the RES capacitor, in-
creasing the delay by a factor of four. The value of the RES
capacitor can be reduced to decrease the time before restart
cycle is initiated.
When using the resistor current sense method, an imbalance
in the input capacitor voltages may develop when operating
in cycle-by-cycle current limiting mode. If the imbalance per-
sists for an extended period, excessive currents in the non-
sensed MOSFET, and possible transformer saturation may
result. This condition is inherent to the half-bridge topology
operated with cycle-by-cycle current limiting and is com-
pounded by only sensing in one leg of the half-bridge circuit.
The imbalance is greatest at large duty cycles (low input volt-
ages). If using this method, it is recommended that the ca-
pacitor on the RES pin be no larger than 220 pF. Check the
final circuit and reduce the RES capacitor further, or omit the
capacitor completely to ensure the voltages across the bridge
capacitors remain balanced. The current limit value may de-
crease slightly as the RES capacitor is reduced.
HO, HB, HS and LO
Attention must be given to the PC board layout for the low-
side driver and the floating high-side driver pins HO, HB and
HS. A low ESR/ESL capacitor (such as a ceramic surface
mount capacitor) should be connected close to the LM5035A,
between HB and HS to provide high peak currents during turn-
on of the high-side MOSFET. The capacitor should be large
enough to supply the MOSFET gate charge (Qg) without dis-
charging to the point where the drop in gate voltage affects
the MOSFET R
ommended.
DS(ON)
. A value ten to twenty times Qg is rec-
FIGURE 9. Current Sense Using Current Sense Resistor (R1)
20
The diode (D
low-side MOSFET is conducting should be capable of with-
standing the full converter input voltage range. When the
high-side MOSFET is conducting, the reverse voltage at the
diode is approximately the same as the MOSFET drain volt-
age because the high-side driver is boosted up to the con-
verter input voltage by the HS pin, and the high side MOSFET
gate is driven to the HS voltage plus VCC. Since the anode
of D
the diode is equal to the input voltage minus the VCC voltage.
D
tions, so a low current ultra-fast recovery diode is recom-
mended to limit the loss due to diode junction capacitance.
Schottky diodes are also a viable option, particularly for lower
input voltage applications, but attention must be paid to leak-
age currents at high temperatures.
The internal gate drivers need a very low impedance path to
the respective decoupling capacitors; the VCC cap for the LO
driver and C
should be as short as possible to reduce inductance and as
wide as possible to reduce resistance. The loop area, defined
by the gate connection and its respective return path, should
be minimized.
The high-side gate driver can also be used with HS connected
to PGND for applications other than a half bridge converter
(e.g. Push-Pull). The HB pin is then connected to VCC, or any
supply greater than the high-side driver undervoltage lockout
(approximately 6.5V). In addition, the high-side driver can be
configured for high voltage offline applications where the
high-side MOSFET gate is driven via a gate drive transformer.
PROGRAMMABLE DELAY (DLY)
The R
SR2 signals and the HO and LO driver outputs.
shows the relationship between these outputs. The DLY pin
is nominally set at 2.5V and the current is sensed through
R
deadtime before the HO and LO pulse (T1) and after the HO
and LO pulse (T2). Typically R
100kΩ. The deadtime periods can be calculated using the
following formulae:
BOOST
DLY
BOOST
to ground. This current is used to adjust the amount of
DLY
average current is less than 20mA in most applica-
resistor programs the delays between the SR1 and
is connected to VCC, the reverse potential across
BOOST
BOOST
T1 = .003 x R
) that charges C
for the HO driver. These connections
30034125
DLY
DLY
BOOST
is in the range of 10kΩ to
+ 4.6 ns
from VCC when the
Figure 5