MAX1167 Maxim, MAX1167 Datasheet - Page 12

• Manufacturer Part Number: MAX1167
• Description: Multichannel / 16-Bit / 200ksps Analog-to-Digital Converters
• Manufacturer: Maxim

In track mode, the analog signal is acquired on the
internal hold capacitor. In hold mode, the T/H switches
open and the capacitive digital-to-analog converter
(DAC) samples the analog input.
During the acquisition, the analog input (AIN_) charges
capacitor C
the T/H switches open. The retained charge on C
represents a sample of the input.
In hold mode, the capacitive DAC adjusts during the
remainder of the conversion cycle to restore node
ZERO to zero within the limits of 16-bit resolution. At the
end of the conversion, force CS high and then low to
reset the T/H switches back to track mode (AIN_),
where C
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
Figure 3. MAX1167 Functional Diagram
12
______________________________________________________________________________________
DAC
DAC
charges to the input signal again.
. At the end of the acquisition interval
AGND
SCLK
AIN0
AIN1
AIN2
AIN3
REF
DIN
CS
OSCILLATOR
ANALOG-INPUT
MULTIPLEXER
REFERENCE
AGND
Track/Hold (T/H)
BIAS
MULTIPLEXER
REFCAP
INPUT REGISTER
RAIL
AZ
CONTROL
BUFFER
DGND
DAC
SUCCESSIVE-APPROXIMATION
DAC
ANALOG-SWITCH FINE TIMING
AV
REGISTER
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens and more time must be
allowed between conversions. The acquisition time
(t
the signal. Use the following formula to calculate acqui-
sition time:
where R
impedance, R
than 729ns. A source impedance of less than 200Ω
does not significantly affect the ADC’s performance.
DD
ACQ
t
ACQ
) is the maximum time the device takes to acquire
COMPARATOR
MAX1167
IN
= 11(R
ACCUMULATOR
= 340Ω, R
MEMORY
DV
DS(ON)
DD
S
+ R
IN
OUTPUT
= 60Ω, and t
S
+ R
= the input signal’s source
DS(ON)
DOUT
EOC
)
✕
ACQ
45pF + 0.3µs
is never less