MAX144 Maxim, MAX144 Datasheet - Page 12

• Manufacturer Part Number: MAX144
• Description: +2.7V / Low-Power / 2-Channel / 108ksps / Serial 12-Bit ADCs in 8-Pin MAX
• Manufacturer: Maxim

fication, and the first four data bits starting with the
MSB. The second 8-bit data stream contains the
remaining bits, D7 through D0.
Using the high-speed QSPI interface with CPOL = 0
and CPHA = 0, the MAX144/MAX145 support a maxi-
mum f
can be programmed to perform a conversion on each
of the two channels for the MAX144. Figure 9b shows
the QSPI interface timing.
Table 2. Detailed SSPCON Register Contents
+2.7V, Low-Power, 2-Channel, 108ksps,
Serial 12-Bit ADCs in 8-Pin µMAX
Figure 9a. QSPI Connections
Figure 9b. QSPI Interface Timing Sequence (CPOL = CPHA = 0)
X = Don’t care
12
SSPOV
SSPM3
SSPM2
SSPM1
SSPM0
SSPEN
WCOL
CKP
CONTROL BIT
______________________________________________________________________________________
SCLK
CS/SHDN
*WHEN CS/SHDN IS HIGH, DOUT = HIGH-Z
DOUT
SCLK
QSPI
of 2.17MHz. The QSPI circuit in Figure 9a
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
MISO
SCK
CS
SS
MAX144/MAX145
SETTINGS
V
DD
X
X
1
0
0
0
0
1
1
SAMPLING INSTANT
2
CS/SHDN
SCLK
DOUT
Write Collision Detection Bit
Receive Overflow Detect Bit
Synchronous Serial-Port Enable Bit.
0: Disables serial port and configures these pins as I/O port pins.
1: Enables serial port and configures SCK, SDO and SCI pins as serial port pins.
Clock Polarity Select Bit. CKP = 0 for SPI master mode selection.
Synchronous Serial-Port Mode Select Bit. Sets SPI master mode and selects
f
3
CLK
MAX144
MAX145
QSPI Interface
CHID D11
= f
4
OSC
MSB
SYNCHRONOUS SERIAL-PORT CONTROL REGISTER (SSPCON)
5
/ 16.
D10
6
D9
7
D8
The MAX144/MAX145 are compatible with a PIC16/
PIC17 controller (µC), using the synchronous serial-port
(SSP) module.
To establish SPI communication, connect the controller
as shown in Figure 10a and configure the PIC16/PIC17
as system master by initializing its synchronous serial-
port control register (SSPCON) and synchronous serial-
port status register (SSPSTAT) to the bit patterns shown
in Tables 2 and 3.
In SPI mode, the PIC16/PIC17 µCs allow 8 bits of data
to be synchronously transmitted and received simulta-
neously. Two consecutive 8-bit readings (Figure 10b)
are necessary to obtain the entire 12-bit result from the
ADC. DOUT data transitions on the serial clock’s falling
edge and is clocked into the µC on SCLK’s rising edge.
The first 8-bit data stream contains three leading ones,
the channel identification, and the first four data bits
starting with the MSB. The second 8-bit data stream
contains the remaining bits, D7 through D0.
8
D7
9
D6
10
PIC16 with SSP Module and PIC17 Interface
D5
11
D4
12
D3
13
D2
14
D1
15
LSB
D0
16
HIGH-Z