MAX15023 Maxim Integrated Products, MAX15023 Datasheet - Page 21

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MAX15023

Manufacturer Part Number
MAX15023
Description
Dual-Output Synchronous Buck Controller
Manufacturer
Maxim Integrated Products
Datasheet

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w w w . d a t a s h e e t 4 u . c o m
If the output capacitor used is a low-ESR tantalum or
ceramic type, the ESR-induced zero frequency is usual-
ly above the targeted zero crossover frequency (f
this case, Type III compensation is recommended.
Type III compensation provides three poles and two
zeros at the following frequencies:
Two midband zeros (f
complex poles introduced by the LC filter:
f
nulling DC output voltage errors:
Depending on the location of the ESR zero (f
can be used to cancel it, or to provide additional atten-
uation of the high-frequency output ripple:
f
The locations of the zeros and poles should be such
that the phase margin peaks around f
Ensure that R
and the parallel resistance of R
than 1/g
to the response and will make it unstable.
The following procedure is recommended:
1) With R
so:
P1
P3
f
attenuates the high-frequency output ripple.
introduces a pole at zero frequency (integrator) for
PO
:
m
. Otherwise, a 180° phase shift is introduced
F
≥ 10kΩ, place the first zero (f
F
f
Z
>>2/g
Type III Compensation Network
1
f
P
C
=
3
f
f
Z
Z
F
______________________________________________________________________________________
1
2
=
2
=
f
π
=
P
=
2
m
2
2
×
π
2
2
π
(1/g
=
R
π
Z1
×
π
1
f
×
F
×
P1
2
R
×
R
π
×
R
F
and f
m
C
F
1
F
= 0
C
×
×
(MIN) = 1/600μS = 1.67kΩ)
I
Wide 4.5V to 28V Input, Dual-Output
×
F
×
×
R
1
1
1
1
C
C
0 5
I
(
C
F
F
=
R
×
1
.
Z2
F
, R
1
×
+
0 5
C
×
+
) cancel the pair of
.
I
C
C
2
f
R
PO
CF
CF
, and R
×
O
I
(See Figure 5)
)
f
.
PO
Z1
I
Synchronous Buck Controller
) at 0.5 x
is greater
ZO
O
), f
). In
P2
2) The gain of the modulator (Gain
The gain of the error amplifier (Gain
quencies is:
The total loop gain as the product of the modulator gain
and the error amplifier gain at f
So:
Therefore:
Solving for C
3) If f
If a ceramic capacitor is used, then the capacitor ESR
zero, f
switching frequency, that is, f
this case, the frequency of the second pole (f
be placed high enough in order not to significantly
erode the phase margin at the crossover frequency. For
example, it can be set at 5 x f
to phase loss at the crossover frequency, f
about 11°:
Once f
V
V
OSC
the regulator’s pulse-width modulator, LC filter,
feedback divider, and associated circuitry at
crossover frequency is:
should be used to cancel f
plot of the loop gain plot does not flatten out soon
after the 0dB crossover, and maintains its
-20dB/decade slope up to 1/2 the switching frequen-
cy. This is likely to occur if the output capacitor is a
low-ESR tantalum or polymer. Then set:
IN
Gain
PO
ZO
P2
×
, is likely to be located even above 1/2 the
(
is known, calculate R
MOD
C
< f
2
I
π
=
I
×
O
:
V
f
=
O
Gain
< f
OSC
)
Gain
V
2
V
OSC
ZO
×
R
IN
EA
C
×
1
1
MOD
OUT
(
=
< f
f
P2
×
=
f
2
P2
(
π
SW
×
2
= 5 x f
V
×
×
π
= f
×
IN
f
O
×
L
Gain
/2, the second pole (f
×
f
P
OUT
1
f
Z0
×
×
O
PO
2
f
O
I
O
:
R
L
ZO
O
, so that its contribution
×
×
0
)
F
EA
OUT
2
< f
C
C
should be equal to 1.
. This way, the Bode
×
MOD
×
I
I
EA
= 1
2
×
O
L
1
π
×
OUT
R
< f
) in midband fre-
×
C
F
)—composed of
f
OUT
O
SW
×
×
/2 < f
C
C
)
P2
OUT
O
I
×
, is only
) should
R
ZO
F
=
. In
P2
21
1
)

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