ATA6830 ATMEL Corporation, ATA6830 Datasheet - Page 5

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ATA6830

Manufacturer Part Number
ATA6830
Description
Intelligent Stepper Motor Driver
Manufacturer
ATMEL Corporation
Datasheet
Digital Part
Figure 4. Digital Blocks
4575C–BCD–05/03
BUS
VREF
Error Timer
Reset
Clk
Figure 4 shows all digital blocks of the circuit. The stepping motor will be controlled by
commands via the bus input pin. An analog comparator is used as a level shifter at the
input. There is also a possibility of clamping the bus pin to ground. This will be used after
detecting an error to feedback this to the microcontroller.
The next block is a UART. Its task is clock recovery and data recognition of the incoming
bit stream. For clock recovery a special bitstream is used after each power on. The gen-
erated bitstream will be analyzed and after a correct parity check interpreted for
execution.
A sophisticated cruise control generates all control signals for the two H-bridge drivers.
It uses an internal step-time table for accelerating and decelerating the stepping motor
depending on the actual and desired position and the temperature and voltage levels.
Exception handling is integrated to interpret and react on the temperature, supply volt-
age, and coil-current signals from the analog part.
Error Signals
Bitstream
Recovery
Recovery
Clock
UART
bitstream
shiftclk
rxd
Parity-Check
Recognition
Data
&
Voltage Levels
reference run
new position
Instantaneous Position
Maximum Step Time
Step Time Memory
Actual Step Time
Desired Position
New Step Time
Cruise Control
Stepper Motor Control
Temperature Signals
ATA6830
Error Signals
5

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