MAX17000A Maxim Integrated Products, MAX17000A Datasheet - Page 26

• Manufacturer Part Number: MAX17000A
• Description: Complete DDR2 and DDR3 Memory Power-Management Solution
• Manufacturer: Maxim Integrated Products

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Complete DDR2 and DDR3 Memory
Power-Management Solution
The maximum ESR to meet ripple requirements is:
where f
With most chemistries (polymer, tantalum, aluminum,
electrolytic), the actual capacitance value required
relates to the physical size needed to achieve low ESR
and the chemistry limits of the selected capacitor tech-
nology. Ceramic capacitors provide low ESR, but the
capacitance and voltage rating (after derating) are
determined by the capacity needed to prevent V
and V
sients. Generally, once enough capacitance is added
to meet the overshoot requirement, undershoot at the
rising load edge is no longer a problem. Thus, the out-
put capacitor selection requires carefully balancing
capacitor chemistry limitations (capacitance vs. ESR
vs. voltage rating) and cost.
For Quick-PWM controllers, stability is determined by the
in-phase feedback ripple relative to the switching frequen-
cy, which is typically dominated by the output ESR. The
boundary of instability is given by the following equation:
where C
total equivalent series resistance of the output capaci-
tors, R
(see Figure 8), and A
For a standard 300kHz application, the effective zero
frequency must be well below 95kHz, preferably below
50kHz. With these frequency requirements, standard
tantalum and polymer capacitors already commonly
used have typical ESR zero frequencies below 50kHz,
allowing the stability requirements to be achieved with-
out any additional current-sense compensation. In the
standard application circuit (Figure 7), the ESR needed
to support a 15mV
5mΩ. Two 330μF, 9mΩ polymer capacitors in parallel
provide 4.5mΩ (max) ESR and 1/(2π x 330μF x 9mΩ) =
53kHz ESR zero frequency.
Ceramic capacitors have a high-ESR zero frequency,
but applications with sufficient current-sense compen-
sation can still take advantage of the small size, low
ESR, and high reliability of the ceramic chemistry. By
the inductor current DCR sensing, applications with
26
______________________________________________________________________________________
SOAR
SENSE
SW
R
OUT
ESR
is the switching frequency.
from causing problems during load tran-
is the total output capacitance, R
≤
R
is the effective current-sense resistance
EFF
⎡
⎢
⎢
⎣
f
SW
(
π
V
IN
=
≥
P-P
V
R
CS
-
IN
2
ESR
V
π
OUT
×
is the current-sense gain of 2.
ripple is 15mV/(10A x 0.3) =
Stability Considerations
×
f
PWM Output Capacitor
+
SW
R
EFF
)
A
×
CS
×
1
V
L
×
OUT
×
C
R
OUT
SENSE
⎤
⎥
⎥
⎦
×
V
RIPP
L L E
ESR
is the
SAG
ceramic output capacitors can be compensated using
either a DC-compensation or AC-compensation
method. The DC-coupling requires fewer external com-
pensation capacitors, but this also creates an output
load line that depends on the inductor’s DCR (parasitic
resistance). Alternatively, the current-sense information
can be AC-coupled, allowing stability to be dependent
only on the inductance value and compensation com-
ponents and eliminating the DC load line (see Figure 9).
When only using ceramic output capacitors, output
overshoot (V
output capacitance requirement. Their relatively low
capacitance value can allow significant output over-
shoot when stepping from full-load to no-load condi-
tions, unless a small inductor value and high switching
frequency are used to minimize the energy transferred
from inductor to capacitor during load-step recovery.
Unstable operation manifests itself in two related, but
distinctly different ways: double pulsing and feedback
loop instability. Double pulsing occurs due to noise on
the output or because the ESR is so low that there is not
enough voltage ramp in the output voltage signal. This
“fools” the error comparator into triggering a new cycle
immediately after the minimum off-time period has
expired. Double pulsing is more annoying than harmful,
resulting in nothing worse than increased output ripple.
However, it can indicate the possible presence of loop
instability due to insufficient ESR. Loop instability can
result in oscillations at the output after line or load
steps. Such perturbations are usually damped, but can
cause the output voltage to rise above or fall below the
tolerance limits.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output voltage ripple envelope for over-
shoot and ringing. It can help to simultaneously monitor
the inductor current with an AC current probe. Do not
allow more than one cycle of ringing after the initial
step-response undervoltage/overshoot.
The input capacitor must meet the ripple current
requirement (I
The I
lowing equation:
The worst-case RMS current requirement occurs when
operating with V
equation simplifies to:
RMS
I
RMS
requirements can be determined by the fol-
SOAR
RMS
=
⎛
⎝ ⎜
I
IN
LOAD
) imposed by the switching currents.
I
V
) typically determines the minimum
RMS
IN
= 2V
Input Capacitor Selection
⎞
⎠ ⎟
= 0.5 x I
OUT
V
OUT
. At this point, the above
×
LOAD
(
V
IN
−
V
OUT
)