MAX1717 Maxim, MAX1717 Datasheet - Page 16

• Manufacturer Part Number: MAX1717
• Description: Dynamically Adjustable / Synchronous Step-Down Controller for Notebook CPUs
• Manufacturer: Maxim

Dynamically Adjustable, Synchronous
Step-Down Controller for Notebook CPUs
external high-side MOSFET. Resistive losses, including
the inductor, both MOSFETs, output capacitor ESR,
and PC board copper losses in the output and ground
tend to raise the switching frequency at higher output
currents. The dead-time effect increases the effective
on-time, reducing the switching frequency. It occurs
only in PWM mode (SKP/SDN = open) and dynamic
output voltage transitions when the inductor current
reverses at light or negative load currents. With
reversed inductor current, the inductor’s EMF causes
LX to go high earlier than normal, extending the on-time
by a period equal to the DH-rising dead time.
For loads above the critical conduction point, where the
dead-time effect is no longer a factor, the actual switching
frequency is:
where V
in the inductor discharge path, including synchronous
rectifier, inductor, and PC board resistances; V
the sum of the parasitic voltage drops in the inductor
charge path, including high-side switch, inductor, and
PC board resistances; and t
ed by the MAX1717.
Three integrator amplifiers provide a fine adjustment to
the output regulation point. One amplifier integrates the
difference between GNDS and GND, a second inte-
grates the difference between FBS and FB. The third
amplifier integrates the difference between REF and the
DAC output. These three transconductance amplifiers’
outputs are directly summed inside the chip, so the
integration time constant can be set easily with one
capacitor. The g
The integrator block has the ability to lower the output
voltage by 2% and raise it by 6%. For each amplifier, the
differential input voltage range is at least ±70mV total,
including DC offset and AC ripple. The integrator corrects
for approximately 90% of the total error, due to finite gain.
The FBS amplifier corrects for DC voltage drops in PC
board traces and connectors in the output bus path
between the DC-DC converter and the load. The GNDS
amplifier performs a similar DC correction task for the
output ground bus. The third integrator amplifier cor-
rects the small offset of the error amplifier and provides
an averaging function that forces V
at the average value of the output ripple waveform.
Integrators have both beneficial and detrimental char-
acteristics. Although they correct for drops due to DC
bus resistance and tighten the DC output voltage toler-
ance limits by averaging the peak-to-peak output ripple,
16
ƒ = (V
______________________________________________________________________________________
OUT
DROP1
+ V
is the sum of the parasitic voltage drops
DROP1
m
of each amplifier is 160µmho (typ).
) / t
ON
ON
Integrator Amplifiers
(V
IN
is the on-time calculat-
+ V
OUT
DROP1
to be regulated
- V
DROP2
DROP2
)
is
they can interfere with achieving the fastest possible
load-transient response. The fastest transient response
is achieved when all three integrators are disabled.
This can work very well if the MAX1717 circuit is placed
very close to the CPU.
All three integrators can be disabled by connecting
FBS to V
be left unconnected, which eliminates a component,
but leaves GNDS connected to any convenient ground.
When the inductor is in continuous conduction, the output
voltage will have a DC regulation higher than the trip
level by 50% of the ripple. In discontinuous conduction
(SKP/SDN open, light-loaded), the output voltage will
have a DC regulation higher than the trip level by
approximately 1.5% due to slope compensation.
There is often a connector, or at least many milliohms of
PC board trace resistance, between the DC-DC con-
verter and the CPU. In these cases, the best strategy is
to place most of the bulk bypass capacitors close to
the CPU, with just one capacitor on the other side of the
connector near the MAX1717 to control ripple if the
CPU card is unplugged. In this situation, the remote-
sense lines (GNDS and FBS) and integrators provide a
real benefit.
When operating the MAX1717 in a voltage-positioned
circuit (Figure 3), GNDS can be offset with a resistor
divider from REF to GND, which causes the GNDS inte-
grator to increase the output voltage by 90% of the
applied offset (27mV typ). A low-value (5mΩ typ) voltage-
positioning resistor is added in series between the
external inductor and the output capacitor. FBS is con-
nected to FB directly at the junction of the external
inductor and the voltage-positioning resistor. The net
effect of these two changes is an output voltage that is
slightly higher than the programmed DAC voltage at
light loads, and slightly less than the DAC voltage at
full-load current. For further information on voltage-posi-
tioning, see the Applications section.
In skip mode (SKP/SDN high), an inherent automatic
switchover to PFM takes place at light loads (Figure 4).
This switchover is effected by a comparator that trun-
cates the low-side switch on-time at the inductor current’s
zero crossing. This mechanism causes the threshold
between pulse-skipping PFM and nonskipping PWM
operation to coincide with the boundary between con-
tinuous and discontinuous inductor-current operation
(see the Continuous-to-Discontinuous Inductor Current
Point graph in the Typical Operating Characteristics).
For a battery range of 7V to 24V, this threshold is rela-
tively constant, with only a minor dependence on bat-
tery voltage:
Automatic Pulse-Skipping Switchover
CC
. When the integrators are disabled, CC can