MAX1718 Maxim, MAX1718 Datasheet - Page 9

• Manufacturer Part Number: MAX1718
• Description: Notebook CPU Step-Down Controller for Intel Mobile Voltage Positioning IMVP-II
• Manufacturer: Maxim

(Circuit of Figure 1, V+ = 12V, V
PIN
7, 8
1
2
3
4
5
6
9
Notebook CPU Step-Down Controller for Intel
SKP/SDN
NAME
S0, S1
TIME
NEG
V
CC
V+
FB
CC
_______________________________________________________________________________________
Battery Voltage Sense Connection. Connect V+ to input power source. V+ is used only for PWM one-shot
timing. DH on-time is inversely proportional to input voltage over a range of 2V to 28V.
Combined Shutdown and Skip-Mode Control. Drive SKP/SDN to GND for shutdown. Leave SKP/SDN open for
low-noise forced-PWM mode, or drive to V
es inductor current recirculation at light loads and suppresses pulse-skipping operation. Forcing SKP/SDN to
12V to 15V disables both the overvoltage protection and undervoltage protection circuits and clears the fault
latch, with otherwise normal pulse-skipping operation. Do not connect SKP/SDN to > 15V.
Slew-Rate Adjustment Pin. Connect a resistor from TIME to GND to set the internal slew-rate clock. A 470kΩ
to 47kΩ resistor sets the clock from 38kHz to 380kHz, f
Feedback Input. Connect FB to the junction of the external inductor and the positioning resistor (Figure 1).
Feedback Offset Adjust Negative Input. The output shifts by an amount equal to the difference between POS
and NEG multiplied by a scale factor that depends on the DAC codes (see the Integrator Amplifiers/Output
Voltage Offsets section). Connect both POS and NEG to REF if the offset function is not used.
Integrator Capacitor Connection. Connect a 47pF to 1000pF (47pF typ) capacitor from CC to GND to set the
integration time constant (see the Integrator Amplifiers/Output Voltage Offsets section).
Suspend-Mode Voltage Select Input. S0 and S1 are four-level digital inputs that select the suspend-mode
VID code for the suspend-mode multiplexer inputs. If SUS is high, the suspend-mode VID code is delivered
to the DAC (see the Internal Multiplexers (ZMODE/SUS) section).
Analog Supply Voltage Input for PWM Core. Connect V
series 20Ω resistor. Bypass to GND with a 0.22µF (min) capacitor.
25
20
15
10
5
0
-0.48
OUTPUT VOLTAGE DISTRIBUTION
DD
Mobile Voltage Positioning (IMVP - II)
= V
OUTPUT VOLTAGE ERROR (%)
-0.24
CC
= SKP/SDN = 5V, V
0.00
Typical Operating Characteristics (continued)
V
0.24
OUT
= 1.25V
0.48
OUT
= 1.25V, T
CC
for pulse-skipping operation. Low-noise forced-PWM mode caus-
FUNCTION
A
25
20
15
10
= +25°C, unless otherwise noted.)
5
0
1.995
REFERENCE VOLTAGE DISTRIBUTION
SLEW
CC
to the system supply voltage (4.5V to 5.5V) with a
1.998
= 150kHz
REFERENCE VOLTAGE (V)
2.000
✕
120kΩ / R
2.002
Pin Description
TIME
2.005
.
9