TEA0679 NXP Semiconductors, TEA0679 Datasheet - Page 14

• Manufacturer Part Number: TEA0679
• Description: I2c-bus Controlled dual Dolby* B-type Noise Reduction Circuit for Playback Applications
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Description of the principle timing diagram for AMS
latch mode without initial input signal (see Fig.7)
This is similar to the description of the principle timing
diagram from AMS scan mode. It only differs in its initial
behaviour and its rise time t
different t
for latch and scan mode).
Running in AMS latch mode, the circuit may be simply
applied to drive a stop solenoid via a power FET. So a
further processing of the AMS output signal is not
necessary. Because there is no processor to make a
decision whether there is plop noise or not, for this mode
the rise time t
1998 Nov 12
handbook, full pagewidth
I
reduction circuit for playback applications
t
2
r
= rise time; t
C-bus controlled dual Dolby* B-type noise
upper threshold
level threshold
time threshold
latch status
to power FET
output signal
r
(hysteresis)
does not occur in the principle timing diagrams
internal
V AMSEQ
r
d
is extended to approximately 150 ms.
4.5 V
= delay time; t
V ref
V in
V t
V l
H
L
AMS on
t 0
b
= burst time; t
r
(it should be noted that the
t 3 t 4
Fig.7 AMS latch mode without initial input signal.
t r
p
= pause time; t
t 5 t 6
t f
t d
f
= fall time.
t 7
14
t 8 t 9 t 10
By activating the AMS latch mode the AMS output will not
change to a LOW level at t
A latch forces the AMS output to remain HIGH until a
signal appears at V
output until the AMS latch mode is started again.
The existence of the latch appears necessary if the AMS
output, for example, drives a stop solenoid via a power
FET. The LOW output level will cause a drive of the stop
solenoid. This will happen after a maximum time of t
occurs without any input signal. If there is no music on tape
for a long time (e.g. at tape end), the AMS mode will be
activated repeatedly as long as there is no signal at V
Thus the circuit waits until music appears before detecting
the pauses.
t b
t r
t 11 t 12
in
(t
t 13 t 14
4
). After t
0
t p
if there is no initial signal at V
t d
4
t 15
the latch will not affect the
V l : voltage at
pin 8 (CONTRA)
V t : voltage at
pin 25 (CONTRB)
Product specification
level detector
input
time detector
input
TEA0679T
MHB122
t
t
t
t
t
d
in
.
in
.