PAC80 Lattice Semiconductor Corp., PAC80 Datasheet - Page 7

• Manufacturer Part Number: PAC80
• Description: In-system Programmable Analog Circuit
• Manufacturer: Lattice Semiconductor Corp.

Connection Notes
1. All inputs and outputs are labeled with plus (+) and minus (-) signs. Polarity is labeled for reference and can be
2. All analog output pins are “hard-wired” to internal output devices and should be left open if not used. V
3. When the signal input is single-ended, the other half of the unused differential input must be connected to a DC
Pin Descriptions
Pin(s) Symbol
10, 11
12, 15
13, 14
selected externally by reversing pin connections.
V
common-mode reference (usually V
16
1
2
3
4
5
6
7
8
9
OUT-
VREFout
should not be tied together as unnecessary power will be dissipated.
ENSPI
TEST
TMS
TDO
GND
OUT
TCK
CAL
TDI
CS
VS
IN
Test Mode Select
Enable SPI Mode
Common-Mode
Outputs (+ or -)
Supply Voltage
Auto-Calibrate
Test Data Out
Inputs (+ or -)
Test Data In
Chip Select
Test Clock
Reference
Test Pin
Ground
Name
REFOUT
Serial interface logic mode select pin (input). JTAG interface mode only.
Serial interface logic clock pin (input). JTAG interface mode only.
Serial interface logic pin (input) for both JTAG and SPI operation modes.
Input data valid on rising edge of TCK (JTAG), or on rising edge of CS (SPI).
Serial interface logic pin (output) for both JTAG and SPI operation modes.
Input data valid on falling edge of TCK (JTAG), or on rising edge of CS (SPI).
Chip select logic input pin. SPI data latch.
Enable SPI logic input pin. When high, causes serial port to run in SPI mode.
Ground pin. Should normally be connected to the analog ground plane.
Common-mode voltage reference output pin (+2.5V nominal). Must be
bypassed to GND with a 1 F capacitor.
Differential input pins, using two pins (e.g., IN+ and IN-). Plus or minus
components of V
Test pin. Connect to GND for proper circuit operation.
Differential output pins, using two pins (e.g., OUT+ and OUT-).
Complementary with respect to V
Analog supply voltage pin (5V nominal). Should be bypassed to GND with 1 F
and .01 F capacitors.
Digital pin (input). Commands an auto-calibration sequence on a rising edge.
, 2.5V).
7
IN
, where differential V
Description
Specifications ispPAC80
REFOUT
IN
. Differential V
= V
IN+
- V
IN-
.
OUT
= V
OUT+
- V
OUT+
OUT-
.
and