WM8711 Wolfson Microelectronics Ltd., WM8711 Datasheet - Page 16

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WM8711

Manufacturer Part Number
WM8711
Description
Internet Audio DAC With Integrated Headphone Driver
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet

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WM8711
WOLFSON MICROELECTRONICS LTD
For applications where a component other than the WM8711 will generate the reference clock, the
external system Master Clock can be applied directly through the XTI/MCLK input pin with no
software configuration necessary. Note that in this situation, the oscillator circuit of the WM8711 can
be safely powered down to conserve power (see POWER DOWN section)
CORE CLOCK
The WM8711 DSP core can be clocked either by MCLK or MCLK divided by 2. This is controlled by
software as shown in Table 6 below.
Table 6 Software Control of Core Clock
Having a programmable MCLK divider allows the device to be used in applications where higher
frequency master Clocks are available. For example the device can support 512Fs master clocks
whilst fundamentally operating in a 256Fs mode.
CRYSTAL OSCILLATOR
The WM8711 includes a crystal oscillator circuit that allows the audio system’s reference clock to be
generated on the device. This is available to the rest of the audio system in buffered form on
CLKOUT. The crystal oscillator is a low radiation type, designed for low EMI. A typical application
circuit is shown Figure 12.
Figure 12 Crystal Oscillator Application Circuit
For crystal frequencies in the 12MHz range, a Cp of 10pF is recommended. For crystal frequencies
in the 18MHz range, 15pF Cp is recommended.
The WM8711 crystal oscillator provides an extremely low jitter clock source. Low jitter clocks are a
requirement for high quality audio DACs, regardless of the converter architecture. The WM8711
architecture is less susceptible than most converter techniques but still requires clocks with less than
approximately 1ns of jitter to maintain performance. In applications where there is more than one
source for the master clock, it is recommended that the clock is generated by the WM8711 to
minimise such problems.
CLOCKOUT
The Core Clock is internally buffered and made available externally to the audio system on the
CLKOUT output pin. CLKOUT provides a replication of the Core Clock, but buffered as suitable for
driving external loads.
There is no phase inversion between XTI/MCLK, the Core Clock and CLOCKOUT but there will
inevitably be some delay. The delay will be dependent on the load that CLOCKOUT drives. Refer to
Electrical Characteristics.
0001000
Sampling
Control
REGISTER
ADDRESS
Cp
XTI/MCLK
DGND
6
BIT
CLKIDIV2
LABEL
DGND
XTO
Cp
0
DEFAULT
Core Clock divider select
1 = Core Clock is MCLK divides by 2
0 = Core Clock is MCLK
DESCRIPTION
PP Rev 1.2 November 2000
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