MAX5100 Maxim, MAX5100 Datasheet - Page 7
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MAX5100
Manufacturer Part Number
MAX5100
Description
+2.7V to +5.5V / Low-Power / Quad / Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs
Manufacturer
Maxim
Datasheet
1.MAX5100.pdf
(8 pages)
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When WR is low, the addressed DAC’s input latch is
transparent. Data is latched when WR is high.
The MAX5100 LDAC feature allows simultaneous
updating of all four DACs. LDAC low latches the data in
the data registers to the DAC registers. If simultaneous
updating is not required, tie LDAC low to keep the DAC
latches transparent. If WR and LDAC are low simultane-
ously, avoid output glitches by ensuring that data is
valid before the two signals go low. When the device
powers up (i.e., V
ly preset with code 00 hex.
Figure 2. Functional Diagram
Table 1. MAX5100 Address Table (Partial)
H = High state, L = Low state, X = Don’t care
LDAC
H
H
H
H
H
L
L
WR
H
H
L
L
L
L
L
8-Bit DAC with Rail-to-Rail Voltage Outputs
A1
+2.7V to +5.5V, Low-Power, Quad, Parallel
H
H
X
X
L
L
L
DD
_______________________________________________________________________________________
A0
H
H
X
L
X
L
L
ramps up), all latches are internal-
D0–D7
Input and DAC data latched
DAC A input latch transparent
All 4 DACs’ DAC latches
transparent
DAC A input registers transpar-
ent and all 4 DACs’ DAC
latches transparent
DAC B input latch transparent
DAC C input latch transparent
DAC D input latch transparent
AO
A1
LATCH STATE
CONTROL
LATCH A
LATCH B
LATCH C
LATCH D
INPUT
INPUT
INPUT
INPUT
LOGIC
WR
LATCH
LATCH
LATCH
LATCH
DAC A
DAC B
DAC C
DAC D
LDAC
The reference source resistance must be considerably
less than the reference input resistance. To keep within
1LSB error in an 8-bit system, R
R
ensure 8-bit accuracy. If V
to GND with a 0.1µF capacitor. Values greater than this
improve noise rejection.
The voltage applied to REF should not exceed V
any time. If proper power sequencing is not possible,
connect an external Schottky diode between REF and
V
ratings.
Digital or AC transient signals on GND can create noise
at the analog output. Return GND to the highest-quality
ground available. Bypass V
located as close to V
Careful PC board ground layout minimizes crosstalk
between the DAC outputs and digital inputs.
TRANSISTOR COUNT: 6848
DD
REF
REF
to ensure compliance with the absolute maximum
DAC C
DAC D
DAC A
DAC B
/ 256. Hence, maintain a value of R
SHDN
MAX5100
Applications Information
Power-Supply Bypassing and
DD
and GND as possible.
REF
DD
Chip Information
Ground Management
OUTA
OUTB
OUTC
OUTD
External Reference
is DC only, bypass REF
Power Sequencing
with a 0.1µF capacitor,
S
must be less than
S
<1kΩ to
DD
at
7