AT91M40400-25C ATMEL Corporation, AT91M40400-25C Datasheet - Page 91
AT91M40400-25C
Manufacturer Part Number
AT91M40400-25C
Description
16/32-bit Microcontroller, 2.7V to 3.6V Operating Range
Manufacturer
ATMEL Corporation
Datasheet
1.AT91M40400-25C.pdf
(116 pages)
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TC User Interface
TC Base Address:
Table 10. TC Global Memory Map
TC_BCR (Block Control Register) and TC_BMR (Block Mode Register) control the TC block. TC Channels are controlled
by the registers listed in Table 11. The offset of each of the Channel registers in Table 11 is in relation to the offset of the
corresponding channel as mentioned in Table 10.
Table 11. TC Channel Memory Map
Note:
Offset
Offset
0xC0
0xC4
0x0C
0x1C
0x2C
0x00
0x40
0x80
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
1.
Read only if WAVE = 0
Channel/Register
TC Channel 0
TC Channel 1
TC Channel 2
TC Block Control Register
TC Block Mode Register
Register
Channel Control Register
Channel Mode Register
Reserved
Reserved
Counter Value
Register A
Register B
Register C
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
0xFFFE0000
TC_BMR
TC_CMR
TC_BCR
TC_CCR
TC_IMR
TC_IER
TC_IDR
TC_CV
TC_RA
TC_RB
TC_RC
TC_SR
Name
Name
Read/Write
Read/Write
See Table 11
See Table 11
See Table 11
Read/Write
Read/Write
Read/Write
Read/Write
Write only
Write only
Read only
Write only
Write only
Read only
Access
Access
AT91M40400
(1)
(1)
Reset State
Reset State
---
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---
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0
0
0
0
0
0
0
91
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