AT94KSeries ATMEL Corporation, AT94KSeries Datasheet - Page 4

• Manufacturer Part Number: AT94KSeries
• Description: Field Programmable System Level Integrated Circuit: 10k - 40k Gates of At40k Fpga With 8-bit Microcontroller And 36k Bytes of SRAM
• Manufacturer: ATMEL Corporation

FPGA Core
Fast, Flexible and
Efficient SRAM
Fast, Efficient Array and
Vector Multipliers
Cache Logic Design
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AT94K Series FPSLIC (Summary)
The embedded AVR core achieves throughputs approaching 1 MIPS per MHz by exe-
cuting powerful instructions in a single-clock cycle, and allows system designers to
optimize power consumption versus processing speed. The AVR core is based on an
enhanced RISC architecture that combines a rich instruction set with 32 general-pur-
pose working registers. All 32 registers are directly connected to the Arithmetic Logic
Unit (ALU), allowing two independent registers to be accessed in one single instruction
executed in one clock cycle. The resulting architecture is more code-efficient while
achieving throughputs up to ten times faster than conventional CISC microcontrollers at
the same clock frequency. The AVR executes out of on-chip SRAM. Both the FPGA
configuration SRAM and the AVR instruction code SRAM can be automatically loaded
at system power-up using Atmel’s in-system programmable (ISP) AT17 Series
EEPROM Configuration Memories.
State-of-the-art FPSLIC design tools, System Designer
tion with the FPSLIC architecture to help reduce overall time-to-market by integrating
microcontroller development and debug, FPGA development and Place and Route, and
complete system co-verification in one easy-to-use software tool.
The AT40K core can be used for high-performance designs, by implementing a variety
of compute-intensive arithmetic functions. These include adaptive finite impulse
response (FIR) filters, fast Fourier transforms (FFT), convolvers, interpolators, and dis-
cre te -co sine tran sfo rms (DC T) that are re quired for vide o compression an d
decompression, encryption, convolution and other multimedia applications.
The AT40K core offers a patented distributed 10 ns SRAM capability where the RAM
can be used without losing logic resources. Multiple independent, synchronous or asyn-
chronous, dual-port or single-port RAM functions (FIFO, scratch pad, etc.) can be
created using Atmel’s macro generator tool.
The AT40K cores patented 8-sided core cell with direct horizontal, vertical and diagonal
cell-to-cell connections implements ultra-fast array multipliers without using any busing
resources. The AT40K core’s Cache Logic capability enables a large number of design
coefficients and variables to be implemented in a very small amount of silicon, enabling
vast improvement in system speed.
The AT40K FPGA core is capable of implementing Cache Logic (dynamic full/partial
logic reconfiguration, without loss of data, on-the-fly) for building adaptive logic and sys-
tems. As new logic functions are required, they can be loaded into the logic cache
without losing the data already there or disrupting the operation of the rest of the chip;
replacing or complementing the active logic. The AT40K FPGA core can act as a recon-
figurable resource within the FPSLIC environment.
™
, were developed in conjunc-
1138FS–FPSLI–06/02