LPC2212 Philips Semiconductors (Acquired by NXP), LPC2212 Datasheet - Page 19

• Manufacturer Part Number: LPC2212
• Description: 16/32-bit Arm Microcontrollers; 128/256 KB Isp/iap Flash With 10-bit ADC And External Memory Interfacebased on a 16/32 Bit ARM7TDMI-STM Cpu With Real-time Emulation And Embedded Trace Support, Together With 128/256 Kilobytes (kB) of Embedded High Spe
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
Table 8:
9397 750 12747
Preliminary data
PINSEL2 bits
13
15:14
17:16
19:18
20
21
22
23
24
27:25
31:28
Pin function select register 2 (PINSEL2 - 0xE002C014)
Description
If bits 25:23 are not 111, controls the use of pin P3.23/A23/XCLK: 0 enables
P3.23, 1 enables XCLK.
Controls the use of pin P3.25: 00 enables P3.25, 01 enables CS2, 10 and 11
are reserved values.
Controls the use of pin P3.24: 00 enables P3.24, 01 enables CS3, 10 and 11
are reserved values.
Reserved.
If bits 5:4 are not 10, controls the use of pin P2.29:28: 0 enables P2.29:28, 1 is
reserved
If bits 5:4 are not 10, controls the use of pin P2.30: 0 enables P2.30, 1 enables
AIN4.
If bits 5:4 are not 10, controls the use of pin P2.31: 0 enables P2.31, 1 enables
AIN5.
Controls whether P3.0/A0 is a port pin (0) or an address line (1).
Controls whether P3.1/A1 is a port pin (0) or an address line (1).
Controls the number of pins among P3.23/A23/XCLK and P3.22:2/A2.22:2 that
are address lines:
000 = None
001 = A3:2 are address
lines.
010 = A5:2 are address
lines.
011 = A7:2 are address
lines.
Reserved.
6.10 External memory controller
6.11 General purpose parallel I/O
The external Static Memory Controller is a module which provides an interface
between the system bus and external (off-chip) memory devices. It provides support
for up to four independently configurable memory banks (16 MBytes each with byte
lane enable control) simultaneously. Each memory banks is capable of supporting
SRAM, ROM, Flash EPROM, Burst ROM memory, or some external I/O devices.
Each memory bank may be 8, 16, or 32 bits wide.
Device pins that are not connected to a specific peripheral function are controlled by
the GPIO registers. Pins may be dynamically configured as inputs or outputs.
Separate registers allow setting or clearing any number of outputs simultaneously.
The value of the output register may be read back, as well as the current state of the
port pins.
100 = A11:2 are address lines.
101 = A15:2 are address lines.
110 = A19:2 are address lines.
111 = A23:2 are address lines.
Rev. 01 — 02 February 2004
16/32-bit ARM microcontrollers with external memory interface
…continued
LPC2212/LPC2214
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Reset value
0
00
00
-
0
1
1
1 if BOOT1:0=00
at RESET=0,
0 otherwise
BOOT1 during
Reset
000 if
BOOT1:0=11 at
Reset, 111
otherwise
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