ADC10061 National Semiconductor Corporation, ADC10061 Datasheet - Page 5

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ADC10061

Manufacturer Part Number
ADC10061
Description
ADC10061 - 10-Bit 600 NS A/D Converter With Input Multiplexer And Sample/Hold, Package: Soic Wide, Pin Nb=20
Manufacturer
National Semiconductor Corporation
Datasheet

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I
I
V
V
I
DI
AI
IN(1)
IN(0)
OUT
t
t
t
t
t
t
t
t
t
t
C
C
C
CONV
CRD
ACC1
ACC2
SH
1H
INTH
P
MS
MH
Symbol
OUT(1)
OUT(0)
DC Electrical Characteristics
Symbol
CC
CC
AC Electrical Characteristics
The following specifications apply for V
nected unless otherwise specified. Boldface limits apply for T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional. These ratings do not guarantee specific performance limits, however. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the
listed test conditons.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: When the input voltage (V
to 5 mA or less. The 20 mA package input current limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
the maximum derated power dissipation will be reached only during fault conditions. For these devices, T
tables below:
The following specifications apply for V
wise specified. Boldface limits apply for T
VIN
OUT
IN
, t
0H
Logical “1” Input Current
Logical “0” Input Current
Logical “1” Output Voltage
Logical “0” Output Voltage
TRI-STATE
DV
AV
Mode 1 Conversion Time from Rising
Edge of S/H to Falling Edge of INT
Mode 2 Conversion Time
Access Time (Delay from Falling
Edge of RD to Output Valid)
Access Time (Delay from Falling
Edge of RD to Output Valid)
Minimum Sample Time
TRI-STATE Control (Delay from
Rising Edge of RD to High-Z State)
Delay from Rising Edge of RD to
Rising Edge of INT
Delay from End of Conversion to Next
Conversion
Multiplexer Control Setup Time
Multiplexer Hold Time
Analog Input Capacitance
Logic Output Capacitance
Logic Input Capacitance
CC
CC
Supply Current
Supply Current
Parameter
®
Output Current
Parameter
IN
) at any pin exceeds the power supply rails (V
+
+
D
= +5V, t
= +5V, V
= (T
A
JMAX
V
V
V
V
V
V
V
CS = S/H = RD = 0, R
CS = S/H = RD = 0, R
CS = S/H = RD = 0, R
CS = S/H = RD = 0, R
= T
IN(1)
IN(0)
+
+
+
OUT
OUT
= 4.5V, I
= 4.5V, I
= 4.5V, I
r
− T
J
(Continued)
REF(+)
= t
= T
R
R
R
Mode 2, R
Mode 1; C
Mode 2; C
( Figure 1 ); (Note 8)
R
C
A
0V
= 5V
= 0V
= 5V
)/
SA
SA
SA
L
L
f
= 20 ns, V
JA
MIN
= 1k, C
= 100 pF
=
= 18k
=
= 5V V
or the number given in the Absolute Maximum Ratings, whichever is lower. In most cases,
OUT
OUT
OUT
to T
Conditions
Conditions
SA
L
L
= −360 µA
= −10 µA
= 1.6 mA
L
5
MAX
A
REF(−)
= 100 pF
= 100 pF
IN
= 10 pF
REF(+)
= 18k
= T
<
; all other limits T
GND or V
SA
SA
SA
SA
J
= GND, and Speed Adjust pin unconnected unless other-
= T
= 5V, V
=
= 18 k
=
= 18 k
MIN
IN
>
to T
V
REF(−)
+
JMAX
) the absolute value of current at that pin should be limited
JMAX
MAX
A
,
(Note 7)
Typical
= GND, and Speed Adjust pin uncon-
= T
; all other limits T
JA
for a board-mounted device can be found from the
600
375
850
530
900
30
30
25
10
10
35
5
5
and the ambient temperature, T
(Note 7)
Typical
J
−0.005
0.005
−0.1
= +25˚C.
0.1
1.0
1.0
30
30
t
(Note 8)
CRD
750/900
Limit
(Note 8)
1400
250
A
60
60
50
50
75
40
Limit
−3.0
4.25
−50
3.0
2.4
0.4
+ 50
50
45
= T
2
J
= +25˚C.
A
. The maximum
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mA (max)
mA (max)
mA (max)
mA (max)
µA (max)
µA (max)
µA (max)
µA (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
pF (max)
pF (max)
pF (max)
V (max)
V (min)
V (min)
ns(max)
ns(max)
(Limit)
(Limit)
Units
Units
ns
ns

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