AD1839 Analog Devices, AD1839 Datasheet - Page 15

• Manufacturer Part Number: AD1839
• Description: 2 ADC, 6 DAC 96 Khz, 24-Bit Sigma Delta Codec
• Manufacturer: Analog Devices

REV. PrD
Pin Name
ASDATA (O)
DSDATA1 (I)
DSDATA2 (I)/AAUXDATA1 (I)
DSDATA3 (I)/AAUXDATA2 (I)
AAUXDATA3 (I)
ALRCLK (O)
ABCLK (O)
DLRCLK (I)/AUXLRCLK(I/O)
DBCLK (I)/AUXBCLK(I/O)
DAUXDATA(O)
(FROM AUX ADC #3)
(FROM AUX ADC#1)
(FROM AUX ADC#1)
(FROM AUX ADC#1)
(FROM AUX ADC#2)
DAUXDATA (OUT)
(TO AUX DAC #1)
AAUXDATA1 (IN)
AAUXDATA2 (IN)
AAUXDATA3 (IN)
TDM (OUT)
LRCLK I
ASDATA1
DSDATA1
DSDATA1
BCLK I
ASDATA
TDM (IN)
FSTDM
BCLK
TDM
AUX
AUX
2
2
S
S
NOTE:
AUX BCLK FREQUENCY IS 64
PRELIMINARY TECHNICAL DATA
MSB TDM
MSB TDM
1ST
1ST
CH
CH
INTERNAL
INTERNAL
ADC L1
DAC L1
32
32
Not Connected
I
I
I
I
I
Not Connected
LRCLK for ADC
BCLK for ADC
LRCLK In/Out Internal DACs
BCLK In/Out Internal DACs
Table II. Pin Function Changes in Auxiliary Mode
2
2
2
2
2
S Mode
S Data Out, Internal ADC
S Data In, Internal DAC1
S Data In, Internal DAC2
S Data In, Internal DAC3
AUX_ADC L2
INTERNAL
DAC L2
I
I
I
I
2
2
2
2
S - MSB LEFT
S - MSB LEFT
S - MSB LEFT
S - MSB LEFT
Figure 11. AUX-Mode Timing
FRAME-RATE; TDM BCLK FREQUENCY IS 256
LEFT
AUX_ADC L3
INTERNAL
DAC L3
AUX_ADC L4
AUX DAC L4
–15–
INTERNAL
INTERNAL
ADC R1
DAC R1
AUX Mode
TDM Data Out to SHARC
TDM Frame Synce Out to SHARC (FSTDM)
TDM BCLK Out to SHARC
AUX LRCLK In/Out. Driven by Ext. LRCLK
from ADC in Slave Mode. In Master Mode,
driven by MCLK/512.
AUX BCLK In/Out. Driven by Ext. BCLK from
ADC in Slave Mode. In Master Mode, driven by
MCLK/8.
AUX-I
TDM Data In from SHARC
AUX-I
AUX-I
AUX-I
2
2
2
2
FRAME-RATE.
AUX_ADC R2
S Data In 1 (from ext. ADC)
S Data In 2 (from ext. ADC)
S Data In 3 (from ext. ADC)
S Data Out (to ext. DAC)
INTERNAL
DAC R2
AUX_ADC R3
INTERNAL
DAC R3
RIGHT
I
I
I
I
2
2
2
2
S - MSB RIGHT
S - MSB RIGHT
S - MSB RIGHT
S - MSB RIGHT
AUX_ADC R4
AUX DAC R4
MSB TDM
MSB TDM
8TH
8TH
CH
CH
AD1839