AD1839 Analog Devices, AD1839 Datasheet - Page 4

• Manufacturer Part Number: AD1839
• Description: 2 ADC, 6 DAC 96 Khz, 24-Bit Sigma Delta Codec
• Manufacturer: Analog Devices

AD1839–SPECIFICATIONS
TIMING
Parameter
MASTER CLOCK AND RESET
SPI PORT
DAC SERIAL PORT
Packed 256 Modes (Slave)
t
t
t
t
t
t
t
t
t
t
t
t
t
Normal Mode (Slave)
MH
ML
PDR
CCH
CCL
CCP
CDS
CDH
CLS
CLH
COE
COD
COTS
t
t
f
t
t
t
t
t
t
f
t
t
t
t
DB
DDS
DDH
DB
DDS
DDH
DBH
DBL
DLS
DLH
DBH
DBL
DLS
DLH
MCLK High
MCLK Low
PD/RST Low
CCLK High
CCLK Low
CCLK Period
CDATA Setup
CDATA Hold
CLATCH Setup
CLATCH Hold
COUT Enable
COUT Delay
COUT Three-State
DBCLK High
DBCLK Low
DBCLK Freq
DLRCLK Setup
DLRCLK Hold
DSDATA Setup
DSDATA Hold
DBCLK High
DBCLK Low
DBCLK Freq
DLRCLK Setup
DLRCLK Hold
DSDATA Setup
DSDATA Hold
PRELIMINARY TECHNICAL DATA
10
10
Min
15
15
20
40
40
80
10
10
60
60
64
10
10
10
10
15
15
256
10
5
10
10
f
S
f
S
–4–
Max
15
20
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Comments
To CCLK Rising
From CCLK Rising
To CCLK Rising
From CCLK Rising
From CLATCH Falling
From CCLK Falling
From CLATCH Rising
To DBCLK Rising
From DBCLK Rising
To DBCLK Rising
From DBCLK Rising
To DBCLK Rising
From DBCLK Rising
To DBCLK Rising
From DBCLK Rising
REV. PrD