ADSST-21065LKCA-240 STMicroelectronics, ADSST-21065LKCA-240 Datasheet - Page 17

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ADSST-21065LKCA-240

Manufacturer Part Number
ADSST-21065LKCA-240
Description
High End/ Multichannel/ 32-Bit Floating-Point Audio Processor
Manufacturer
STMicroelectronics
Datasheet
REV. 0
Figure 8. Typical Rise and Fall Time (0.8 V–2.0 V)
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
–2
–1
6
5
4
3
2
1
0
0
0
0
Figure 9. Typical Output Delay or Hold
20
20
40
40
60
60
LOAD CAPACITANCE – pF
LOAD CAPACITANCE – pF
RISE TIME
80
80
100
100
120
120
FALL TIME
140
140
160
160
180
180
200
200
–17–
Power Dissipation
Total power dissipation has two components: one due to internal
circuitry and one due to the switching of external output drivers.
Internal power dissipation depends on the sequence in which
instructions execute and the data operands involved. See I
calculation in Electrical Characteristics section. Internal power
dissipation is calculated this way:
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
The external component is calculated using:
The load capacitance should include the processor’s package
capacitance (C
and then back low. Address and data pins can drive high and low
at a maximum rate of 1/t
Example: Estimate P
Number of output pins that switch during each cycle (O)
Maximum frequency at which the pins can switch (f)
Load capacitance of the pins (C)
Voltage swing of the pins (V
A system with one bank of external memory (32-bit)
Two 1 M
load of 3 pF and a data signal load of 4 pF
External data writes occur in burst mode, two every 1/t
cycles, a potential frequency of 1/t
pin switching
The external SDRAM clock rate is 60 MHz (2/t
IN
). The frequency f includes driving the load high
16 SDRAM chips, each with a control signal
P
EXT
EXT
P
INT
CK
=
with the following assumptions:
O C V
while in SDRAM burst mode.
=
SST-Melody-SHARC
I
×
DDIN
DD
×
)
×
DD
V
CK
DD
2
cycles/s. Assume 50%
×
f
CK
)
DDIN
CK

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