ADSST-21065LKCA-240 STMicroelectronics, ADSST-21065LKCA-240 Datasheet - Page 2

• Manufacturer Part Number: ADSST-21065LKCA-240
• Description: High End/ Multichannel/ 32-Bit Floating-Point Audio Processor
• Manufacturer: STMicroelectronics

SST-Melody-SHARC–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
Parameter
V
T
V
V
V
NOTES
1
2
3
ELECTRICAL CHARACTERISTICS
Parameter
V
V
I
I
I
I
I
I
I
I
I
C
NOTES
10
11
Specifications subject to change without notice.
1
2
3
4
5
6
7
8
9
See Environmental Conditions section for information on thermal specifications.
Applies to input and bidirectional pins: DATA31–0, ADDR23–0, BSEL, RD, WR, SW, ACK, SBTS, IRQ2–0, FLAG11–0, HBG, CS, DMAR1, DMAR2, BR2–1, ID2–0,
RPBA, CPA, TFS0, TFS1, RFS0, RFS1, BMS, TMS, TDI, TCK, HBR, DR0A, DR1A, DR0B, DR1B, TCLK0, TCLK1, RCLK0, RCLK1, RESET, TRST,
PWM_EVENT0, PWM_EVENT1, RAS, CAS, SDWE, SDCKE.
Applies to input pin CLKIN.
IH
IL
ILP
OZH
OZL
OZLS
OZLA
OZLAR
OZLC
DD
IH
IL1
IL2
OH
OL
Applies to output and bidirectional pins: DATA31–0, ADDR 23–0, MS3–0, RD, WR, SW, ACK, FLAG11–0, HBG, REDY, DMAG1, DMAG2, BR2–1, CPA,
TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, DT0A, DT1A, DT0B, DT1B, XTAL, BMS, TDO, EMU, BMSTR, PWM_EVENT0,
PWM_EVENT1, RAS, CAS, DQM, SDWE, SDCLK0, SDCLK1, SDCKE, SDA10.
See Output Drive Current section for typical drive current capabilities.
Applies to input pins: ACK, SBTS, IRQ2–0, HBR, CS, DMAR1, DMAR2, ID1–0, BSEL, CLKIN, RESET, TCK (Note that ACK is pulled up internally with 2 kΩ
during reset in a multiprocessor system, when ID1–0 = 01 and another SST-Melody-SHARC is not requesting bus mastership).
Applies to input pins with internal pull-ups: DR0A, DR1A, DR0B, DR1B, TRST, TMS, TDI.
Applies to three-statable pins: DATA31–0, ADDR 23–0, MS3–0, RD, WR, SW, ACK, FLAG11–0, REDY, HBG, DMAG1, DMAG2, BMS, TDO, RAS, CAS,
when ID1–0 = 01 and another SST-Melody-SHARC is not requesting bus mastership).
Applies to three-statable pins with internal pull-ups: DT0A, DT1A, DT0B, DT1B, TCLK0, TCLK1, RCLK0, RCLK1.
Applies to CPA pin.
Applies to ACK pin when pulled up.
Applies to ACK pin when keeper latch enabled.
Guaranteed but not tested.
Applies to all signal pins.
CASE
IN
DQM, SDWE, SDCLK0, SDCLK1, SDCKE, SDA10, and EMU (note that ACK is pulled up internally with 2 kΩ during reset in a multiprocessor system,
High Level Output Voltage
Low Level Output Voltage
High Level Input Current
Low Level Input Current
Low Level Input Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Input Capacitance
10, 11
Supply Voltage
Case Operating Temperature
High Level Input Voltage
Low Level Input Voltage
Low Level Input Voltage
3
4
3
1
1
5, 6, 7, 8
5
6
9
8
7
Test Conditions
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
f
IN
= 1 MHz, T
2
3
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= min, I
= min, I
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
1
Test
Conditions
@ V
@ V
@ V
–2–
DD
DD
DD
CASE
OH
OL
IN
IN
IN
IN
IN
IN
IN
IN
IN
= max
= min
= min
= +4.0 mA
= –2.0 mA
= V
= 0 V
= 0 V
= V
= 0 V
= 0 V
= 1.5 V
= 0 V
= 0 V
= 25°C, V
DD
DD
max
max
Min
3.13
–40
2.0
–0.5
–0.5
2
2
IN
C Grade
= 2.5 V
Max
3.60
+100
V
+0.8
+0.7
DD
+ 0.5
Min
2.4
C and K Grades
Min
3.13
0
2.0
–0.5
–0.5
K Grade
Max
3.60
+85
V
+0.8
+0.7
Max
0.4
10
10
150
10
8
150
350
4
1.5
8
DD
+ 0.5 V
REV. 0
Unit
V
°C
V
V
Unit
V
V
µA
µA
µA
µA
µA
µA
µA
mA
mA
pF