STK16C88-3 Simtek, STK16C88-3 Datasheet - Page 8

• Manufacturer Part Number: STK16C88-3
• Description: CMOS Nonvolatile Static RAM
• Manufacturer: Simtek

STK16C88-3
March 2006
To initiate the software
READ
The software sequence must be clocked with E
controlled
Once the sixth address in the sequence has been
entered, the
chip will be disabled. It is important that
cycles and not
sequence, although it is not necessary that G be
low for the sequence to be valid. After the t
cycle time has been fulfilled, the
activated for
SOFTWARE NONVOLATILE RECALL
A software
sequence of
to the software
RECALL
operations must be performed:
Internally,
the
1. Read address
2. Read address
3. Read address
4. Read address
5. Read address
6. Read address
1. Read address
2. Read address
3. Read address
4. Read address
5. Read address
6. Read address
SRAM
50
50
40
30
20
10
sequence must be performed:
0
cycle, the following sequence of
data is cleared, and second, the nonvola-
READ
RECALL
READ
STORE
READ
RECALL
Figure 2: I
50
s.
STORE
WRITE
and
is a two-step procedure. First,
operations in a manner similar
0E38 (hex)
31C7 (hex)
03E0 (hex)
3C1F (hex)
303F (hex)
0FC0 (hex)
0E38 (hex)
31C7 (hex)
03E0 (hex)
3C1F (hex)
303F (hex)
0C63 (hex)
cycle will commence and the
Cycle Time (ns)
100
CC
WRITE
cycle is initiated with a
STORE
(max) Reads
initiation. To initiate the
cycles be used in the
150
operation.
cycle, the following
SRAM
TTL
CMOS
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
Initiate STORE cycle
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
Initiate RECALL cycle
200
will again be
READ
READ
STORE
8
tile information is transferred into the
After the t
be ready for
RECALL
Nonvolatile Elements. The nonvolatile data can be
recalled an unlimited number of times.
HARDWARE PROTECT
The
against inadvertent
WRITE
V
WRITE
LOW AVERAGE ACTIVE POWER
The STK16C88-3 draws significantly less current
when it is cycled at times longer than 55ns. Figure 2
shows the relationship between I
time. Worst-case current consumption is shown for
both
perature range, V
chip enable). Figure 3 shows the same relationship
for
less than 100%, only standby current is drawn
when the chip is disabled. The overall average cur-
rent drawn by the STK16C88-3 depends on the fol-
lowing items: 1)
duty cycle of chip enable; 3) the overall cycle rate
for accesses; 4) the ratio of
the operating temperature; 6) the V
O loading.
SWITCH
WRITE
Document Control # ML0019 rev 0.2
CMOS
STK16C88-3
s during low-voltage conditions. When V
s are inhibited.
, all software
40
40
30
30
20
20
10
10
50
0
0
operation in no way alters the data in the
RECALL
cycles. If the chip enable duty cycle is
and
Figure 3: I
READ
cycle time the
50
TTL
CMOS
CC
STORE
STORE
input levels (commercial tem-
offers
= 3.6V, 100% duty cycle on
and
Cycle Time (ns)
CC
100
vs.
(max) Writes
WRITE
TTL
operations and
operation and
hardware
READ
SRAM
150
input levels; 2) the
TTL
CMOS
CC
operations. The
CC
s to
and
will once again
level; and 7) I/
200
SRAM
READ
WRITE
protection
SRAM
SRAM
cells.
cycle
s; 5)
CC
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